JPS63111652A - Wafer bonding - Google Patents

Wafer bonding

Info

Publication number
JPS63111652A
JPS63111652A JP25705486A JP25705486A JPS63111652A JP S63111652 A JPS63111652 A JP S63111652A JP 25705486 A JP25705486 A JP 25705486A JP 25705486 A JP25705486 A JP 25705486A JP S63111652 A JPS63111652 A JP S63111652A
Authority
JP
Japan
Prior art keywords
wafer
film
silicon
bonding
sio2 film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25705486A
Other languages
Japanese (ja)
Inventor
Yoshihiro Arimoto
由弘 有本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP25705486A priority Critical patent/JPS63111652A/en
Publication of JPS63111652A publication Critical patent/JPS63111652A/en
Pending legal-status Critical Current

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  • Ceramic Products (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

PURPOSE:To realize uniform bonding, of course, not using a bonding agent and not allowing existence of a cavity at the interface of a bonding area by executing a hydrophilic processing to the surface of silicon dioxide of the one wafer, not executing the hydrophilic processing to the surface of silicon dioxide of the other wafer and stacking and then bonding these wafers through the heat treatment. CONSTITUTION:The SiO2 film 12 is grown on the surface of a silicon wafer 11 while the SiO2 film 14 is also grown respectively on the surface of a silicon wafer 13 by application of thermal oxidation method. The silicon wafer 13 on which the SiO2 film 14 is grown is soaked into the H2SO4+H2O2 (2:1) solution to form hydrophilic water layer 15 to the surface of SiO2 film 14. The silicon wafer 13 including the SiO2 film 14 to which the hydrophilic processing is executed and the silicon wafer 11 including the SiO2 film 12 to which the hydrophilic processing is not executed are stacked to that the SiO2 films 12 and 14 are opposed to each other and thereafter these are bonded through the heat processing.

Description

【発明の詳細な説明】 〔概要〕 本発明は、ウェハ接着方法に於いて、一方のウェハに於
ける二酸化シリコン膜表面には親水性処理を施し、他方
のウェハに於ける二酸化シリコン膜表面は親水性処理を
行うことなく、それ等を重ね合わせて熱処理を行って接
着することに依り、接着剤を要しないことは勿論、接着
された界面に空隙などが存在しない均一な接着を可能と
したものである。
[Detailed Description of the Invention] [Summary] In the wafer bonding method of the present invention, the surface of the silicon dioxide film on one wafer is subjected to hydrophilic treatment, and the surface of the silicon dioxide film on the other wafer is By stacking them and heat-treating them without hydrophilic treatment, we not only do not need adhesive, but also achieve uniform adhesion with no voids at the bonded interface. It is something.

〔産業上の利用分野〕[Industrial application field]

本発明は、ウェハ、例えば半導体ウェハを接着剤なしで
他の半導体ウェハや基板に貼付したい場合に用いて好適
なウェハ接着方法に関する。
The present invention relates to a wafer bonding method suitable for use when it is desired to bond a wafer, such as a semiconductor wafer, to another semiconductor wafer or a substrate without using an adhesive.

〔従来の技術〕[Conventional technology]

現在、半導体ウェハを同様な半導体ウェハ或いは他の基
板に貼付する技術は、半導体装置を高集積化及び高性能
化する上で甚だ重要なものとなりつつある。
At present, the technique of bonding a semiconductor wafer to a similar semiconductor wafer or another substrate is becoming extremely important in increasing the integration and performance of semiconductor devices.

第6図及び第7図はウェハ接着方法の従来例を説明する
為の工程要所に於けるウェハの要部切断側面図をそれぞ
れ表し、以下、これ等の図を参照しつつ解説する。
6 and 7 are cutaway side views of essential parts of a wafer at key points in the process for explaining a conventional wafer bonding method, and the explanation will be given below with reference to these figures.

第6図参照 (1)  化学気相堆積(chemical  vap
See Figure 6 (1) Chemical vapor deposition
.

r  deposition:CVD)法を適用するこ
とに依り、シリコン・ウェハ1の表面に二酸化シリコン
(StOz)膜2を形成し、また、シリコン・ウェハ3
の表面には5i02膜4を形成する。尚、S i O2
膜2或いは4を形成するには、前記CVD法の外、熱酸
化法、シリカ液をスピン・コート法で塗布して乾燥させ
る方法などを適用しても良く、何れにせよ、それ等の表
面は鏡面になっている必要がある。
By applying a deposition (CVD) method, a silicon dioxide (StOz) film 2 is formed on the surface of a silicon wafer 1, and a silicon wafer 3 is
A 5i02 film 4 is formed on the surface. Furthermore, S i O2
In order to form the film 2 or 4, in addition to the above-mentioned CVD method, a thermal oxidation method, a method of applying a silica liquid by spin coating and drying, etc. may be applied, and in any case, the surface must have a mirror surface.

(2)Si02膜2或いは4が形成されたシリコン・ウ
ェハ1及び3をH2SO4+H2O2(2=1)液中に
浸漬して5t02膜2及び4の表面を親木処理する。
(2) The silicon wafers 1 and 3 on which the Si02 films 2 or 4 have been formed are immersed in a H2SO4+H2O2 (2=1) solution to perform parent wood treatment on the surfaces of the 5t02 films 2 and 4.

これに依り、5i02膜2及び4の表面には水分が吸着
され、図では、その水分層を記号5及び6で指示しであ
る。
As a result, moisture is adsorbed on the surfaces of the 5i02 films 2 and 4, and the moisture layers are indicated by symbols 5 and 6 in the figure.

第7図参照 (3)シリコン・ウェハ1及び3のS i 02膜2及
び4側を対向して重ね合わせてから、温度1000(’
C)、時間30〔分〕の熱処理を行って両者を接着する
。尚、記号7は、5i02膜2及び4の表面に吸着され
ていた水分が気化して生成された剥離部分を指示してい
る。
Refer to FIG. 7. (3) The Si 02 films 2 and 4 sides of the silicon wafers 1 and 3 are stacked facing each other, and then heated to a temperature of 1000 ('
C), heat treatment is performed for 30 minutes to bond the two. Note that the symbol 7 indicates a peeled portion formed by vaporization of moisture adsorbed on the surfaces of the 5i02 films 2 and 4.

このようにしてシリコン・ウェハ1及び3が接着される
のは、S i O2膜2及び4の表面が親木処理された
ことから、そこにシラノール(Si−OH)基が存在し
、それが熱処理に依って脱水縮合反応することでシロキ
サン結合するからである。
The reason why the silicon wafers 1 and 3 are bonded together in this way is that the surfaces of the SiO2 films 2 and 4 have been subjected to parent wood treatment, and silanol (Si-OH) groups exist there. This is because siloxane bonds are formed by a dehydration condensation reaction caused by heat treatment.

その場合の反応を式で表すと、 (S i −0H) + (S i −0H)→Hz 
O+(S i −0−3i) となる。
The reaction in that case is represented by the formula: (S i -0H) + (S i -0H) → Hz
O+(S i -0-3i).

前記のようなシロキサン結合を利用すると、シリコン・
ウェハ以外のもの、例えばGaAsウェハは勿論のこと
、SiO2膜を形成できるものであれば前記と同様にし
て接着することができる。
By using the siloxane bond as described above, silicon
Any material other than a wafer, such as a GaAs wafer, or any material on which a SiO2 film can be formed can be bonded in the same manner as described above.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

”前記の説明、特に、第7図及びそれに関する説明から
明らかなように、従来技術に依った場合、接着されたS
 i O2膜2及び4の界面に剥離部分7を生ずること
が多く、均一に接着するのは容易でない。
``As is clear from the foregoing description, particularly from FIG. 7 and the related description, in the prior art the bonded
A peeled portion 7 often occurs at the interface between the i O2 films 2 and 4, and it is not easy to bond them uniformly.

本発明は、シラノール基の脱水縮合反応に依るシロキサ
ン結合を利用してウェハを接着するに際し、その界面に
剥離部分が発生することがないウェハ接着方法を提供し
ようとする。
The present invention aims to provide a wafer bonding method that does not generate peeling portions at the interface when bonding wafers using siloxane bonds resulting from a dehydration condensation reaction of silanol groups.

〔問題点を解決するための手段〕[Means for solving problems]

前記したように、ウェハ1及び3を接着して剥離部分7
を生ずるのは、水分が気化して空隙が形成されることに
依るものである。
As described above, the wafers 1 and 3 are bonded and the peeled portion 7 is
This is caused by the vaporization of moisture and the formation of voids.

従って、これを回避するには、5i02膜2及び4に吸
着される水分を少なくすることが必要である。
Therefore, to avoid this, it is necessary to reduce the amount of water adsorbed by the 5i02 films 2 and 4.

第1図及び第2図は本発明の詳細な説明する為のウェハ
の要部切断側面図を表し、以下、これ等の図を参照しつ
つ説明する。
1 and 2 are cross-sectional side views of essential parts of a wafer for explaining the present invention in detail, and the following description will be made with reference to these figures.

第1図参照 (1)表面にSiO2膜2を有するシリコン・ウェハ1
と同じく表面にS f O2膜4を有するシリコン・ウ
ェハ3を用意し、S i O2膜2の表面は形成時のま
まとし、5i02膜4の表面は親水性にする。
See Figure 1 (1) Silicon wafer 1 with SiO2 film 2 on the surface
Similarly, a silicon wafer 3 having a S f O2 film 4 on its surface is prepared, the surface of the S i O2 film 2 is left as it was when it was formed, and the surface of the 5i02 film 4 is made hydrophilic.

これに依り、5i02膜4の表面には水分が吸着されて
水分層6が形成される。
As a result, moisture is adsorbed on the surface of the 5i02 film 4 and a moisture layer 6 is formed.

第2図参照 (2)  ウェハ1及び3を5i02膜2と4が対向す
るように重ね合わせ、熱処理を行って接着を行う。
See FIG. 2 (2) Wafers 1 and 3 are placed one on top of the other so that 5i02 films 2 and 4 face each other, and bonded by heat treatment.

このようにして接着を行うと、S i O2膜2と4の
間に介在する水分は従来技術に依る場合の半分以下にな
り、その界面に空隙が発生することはなく、従って、剥
離部分は存在しない。
When bonding is performed in this way, the amount of water intervening between the SiO2 films 2 and 4 is less than half of that in the case of conventional technology, and no voids are generated at the interface, so the peeled portion is not exist.

前記したようなことから、本発明に依るウェハ接着方法
に於いては、接着されるべきウェハ(例えばシリコン・
ウェハ11及び13)の表面に二酸化シリコン膜(例え
ば5i02膜12及び5i02膜14)を形成する工程
と、次いで、一方のウェハに於ける二酸化シリコン膜の
表面に親水性処理(例えばH2SO4+H2O2(2:
1)液中に浸漬)を施す工程と、次いで、親水性処理を
施したウェハと施していないウェハとを二酸化シリコン
膜が対向するように重ね合わせて熱処理する工程とが含
まれてなる構成を採っている。
As described above, in the wafer bonding method according to the present invention, the wafer to be bonded (for example, silicon
Forming a silicon dioxide film (for example, 5i02 film 12 and 5i02 film 14) on the surface of the wafers 11 and 13), and then applying a hydrophilic treatment (for example, H2SO4+H2O2 (2:
1) a process of immersing the wafer in a liquid), and then a process of superimposing a wafer that has undergone hydrophilic treatment and a wafer that has not undergone hydrophilic treatment so that their silicon dioxide films face each other and heat-treating the wafer. I'm picking it up.

〔作用〕[Effect]

前記手段に依ると、接着すべきウェハの一方の表面は水
分を吸着し易い状態に、また、他方は水分・を吸着し難
い状態になっていて、接着時にウェハ間に介在する水分
は従来技術に依る場合と比較すると約半分の量になって
いるから、接着の為の熱処理を行っても、界面に空隙が
できる程の気体は発生せず、従って、剥離も起こらずに
均一な接着が可能である。
According to the above means, one surface of the wafers to be bonded is in a state where it is easy to adsorb moisture, and the other surface is in a state where it is difficult to adsorb moisture. The amount is about half that of the case where the bonding is done, so even if heat treatment is performed for bonding, gas will not be generated to the extent that voids will form at the interface, and therefore uniform bonding will not occur without peeling. It is possible.

〔実施例〕〔Example〕

第3図乃至第5図は本発明一実施例を解説する為の工程
要所に於けるウェハの要部切断側面図を表し、以下、こ
れ等の図を参照しつつ説明する。
FIGS. 3 to 5 are cross-sectional side views of essential parts of a wafer at key points in the process for explaining one embodiment of the present invention, and the following description will be made with reference to these figures.

第3図参照 (1)  熱酸化法を適用することに依り、シリコン・
ウェハ11の表面にはStO,膜12を、そして、シリ
コン・ウェハ13の表面には5i02膜14をそれぞれ
成長させる。
See Figure 3 (1) By applying the thermal oxidation method, silicon
A StO film 12 is grown on the surface of the wafer 11, and a 5i02 film 14 is grown on the surface of the silicon wafer 13.

この場合、Sio2膜12及び14の厚さとしては、1
00 (nm) 〜1000 (nm)、好ましくは2
00(nm)程度にすると良い。
In this case, the thickness of the Sio2 films 12 and 14 is 1
00 (nm) to 1000 (nm), preferably 2
It is preferable to set it to about 00 (nm).

SiO2膜12及び14の厚さを200(nm〕とする
には、温度1000(”C)の酸化性雰囲気中にて45
 〔分〕の熱酸化を行うことで達成される。
In order to make the thickness of the SiO2 films 12 and 14 200 (nm), the thickness of
This is achieved by performing thermal oxidation for [minutes].

第4図参照 (2)Si02膜14が成長されたシリコン・ウェハ1
3をH2SO4+H2O2(2: 1)液中に浸漬し、
S i 02膜140表面を親水性にする。尚、記号1
5はS i O2膜14の表面に在る水分層を指示して
いる。
See Figure 4 (2) Silicon wafer 1 on which Si02 film 14 is grown
3 is immersed in H2SO4 + H2O2 (2: 1) solution,
The surface of the S i 02 film 140 is made hydrophilic. Furthermore, symbol 1
5 indicates a moisture layer existing on the surface of the S i O 2 film 14 .

第5図参照 (31S i O2膜工4に親水性処理を施したシリコ
ン・ウェハ13及び親水性処理を施していない5i02
膜12を有するシリコン・ウェハ11を5i02膜12
及び14が対向するように重ね合わせた後、温度を90
0(t)とし、時間10〔分〕の熱処理を行って両者を
接着する。
See Figure 5 (31S i silicon wafer 13 with O2 film 4 subjected to hydrophilic treatment and 5i02 without hydrophilic treatment).
5i02 silicon wafer 11 with film 12
and 14 are placed on top of each other so that they face each other, and then the temperature is set to 90
0 (t) and heat treatment for 10 minutes to bond the two.

このようにして接着したシリコン・ウェハ11及び12
の界面には空隙は発生せず、従って、剥離もなかった。
Silicon wafers 11 and 12 bonded in this way
No voids were generated at the interface, and therefore there was no peeling.

〔発明の効果〕〔Effect of the invention〕

、本発明に依るウェハ接着方法に於いては、一方のウェ
ハに於ける二酸化シリコン膜表面には親水性処理を施し
、他方のウェハに於ける二酸化シリコン膜表面は親水性
処理を行うことなく、それ等を重ね合わせて熱処理を行
って接着するようにしている。
In the wafer bonding method according to the present invention, the silicon dioxide film surface of one wafer is subjected to hydrophilic treatment, and the silicon dioxide film surface of the other wafer is not subjected to hydrophilic treatment. They are stacked on top of each other and heat treated to bond them together.

前記構成に依ると、接着すべきウェハの一方の−表面は
親水性で水分を吸着し易い状態に、また、他方は水分を
吸着し難い状態になっていて、接着時にウェハ間に介在
する水分は従来技術に依る場合と比較すると約半分の量
になっているから、接着の為の熱処理を行っても、界面
に空隙ができる程の気体は発生せず、従って、剥離も起
こらずに均一な接着が可能である。
According to the above configuration, one surface of the wafers to be bonded is hydrophilic and easily adsorbs moisture, and the other surface is in a state that is difficult to adsorb moisture, so that the moisture intervening between the wafers during bonding is The amount is about half that of the case using conventional technology, so even if heat treatment is performed for adhesion, gas is not generated to the extent that voids are created at the interface, and therefore, there is no peeling and a uniform bonding is achieved. Adhesion is possible.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は本発明の詳細な説明する為のウェハ
の要部切断側面図、第3図乃至第5図は本発明一実施例
を説明する為の工程要所に於けるウェハの要部切断側面
図、第6図及び第7図は従来例を説明する為の工程要所
に於けるウェハの要部切断側面図をそれぞれ表している
。 図に於いて、11及び13はシリコン・ウェハ、12及
び14は5i02膜、15は水分層をそれぞれ示してい
る。 特許出願人   富士通株式会社 代理人弁理士  相 谷 昭 司 代理人弁理士  渡 邊 弘 − 本完明の原理を説明する為のウェハの要部切断側面図本
弁明の原理を説明する為のウェハの要部切断側面図第2
図 第3図 第4図 抗5図 第6図
FIGS. 1 and 2 are cross-sectional side views of essential parts of a wafer for explaining the present invention in detail, and FIGS. 3 to 5 are cross-sectional views of a wafer at important points in the process for explaining an embodiment of the present invention. FIGS. 6 and 7 are cross-sectional side views of essential parts of a wafer at key points in the process for explaining the conventional example. In the figure, 11 and 13 are silicon wafers, 12 and 14 are 5i02 films, and 15 is a water layer, respectively. Patent Applicant Fujitsu Ltd. Representative Patent Attorney Akio Aitani Representative Patent Attorney Hiroshi Watanabe - Cutaway side view of the main part of a wafer to explain the principle of this defense Main part cutaway side view 2nd
Figure 3 Figure 4 Diagram 5 Figure 6

Claims (1)

【特許請求の範囲】 接着されるべきウェハの表面に二酸化シリコン膜を形成
する工程と、 次いで、一方のウェハに於ける二酸化シリコン膜の表面
に親水性処理を施す工程と、 次いで、親水性処理を施したウェハと施していないウェ
ハとを二酸化シリコン膜が対向するように重ね合わせて
熱処理する工程と が含まれてなることを特徴とするウェハ接着方法。
[Claims] A step of forming a silicon dioxide film on the surface of the wafers to be bonded, a step of performing hydrophilic treatment on the surface of the silicon dioxide film on one of the wafers, and then a hydrophilic treatment. A wafer bonding method comprising the steps of stacking a wafer subjected to the process and a wafer not subjected to the process so that their silicon dioxide films face each other and subjecting them to heat treatment.
JP25705486A 1986-10-30 1986-10-30 Wafer bonding Pending JPS63111652A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25705486A JPS63111652A (en) 1986-10-30 1986-10-30 Wafer bonding

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25705486A JPS63111652A (en) 1986-10-30 1986-10-30 Wafer bonding

Publications (1)

Publication Number Publication Date
JPS63111652A true JPS63111652A (en) 1988-05-16

Family

ID=17301095

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25705486A Pending JPS63111652A (en) 1986-10-30 1986-10-30 Wafer bonding

Country Status (1)

Country Link
JP (1) JPS63111652A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09223781A (en) * 1995-12-15 1997-08-26 Komatsu Electron Metals Co Ltd Manufacture of clad soi wafer
KR100236065B1 (en) * 1996-12-17 1999-12-15 Hyundai Micro Electronics Co Hydrophilic method of semiconductor device
WO2003097552A1 (en) * 2002-04-30 2003-11-27 Agency For Science Technology And Research A method of wafer/substrate bonding
US7153759B2 (en) 2004-04-20 2006-12-26 Agency For Science Technology And Research Method of fabricating microelectromechanical system structures
US7259466B2 (en) 2002-12-17 2007-08-21 Finisar Corporation Low temperature bonding of multilayer substrates
US7361593B2 (en) 2002-12-17 2008-04-22 Finisar Corporation Methods of forming vias in multilayer substrates
US7927975B2 (en) 2009-02-04 2011-04-19 Micron Technology, Inc. Semiconductor material manufacture

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09223781A (en) * 1995-12-15 1997-08-26 Komatsu Electron Metals Co Ltd Manufacture of clad soi wafer
KR100236065B1 (en) * 1996-12-17 1999-12-15 Hyundai Micro Electronics Co Hydrophilic method of semiconductor device
WO2003097552A1 (en) * 2002-04-30 2003-11-27 Agency For Science Technology And Research A method of wafer/substrate bonding
US7192841B2 (en) 2002-04-30 2007-03-20 Agency For Science, Technology And Research Method of wafer/substrate bonding
US7259466B2 (en) 2002-12-17 2007-08-21 Finisar Corporation Low temperature bonding of multilayer substrates
US7361593B2 (en) 2002-12-17 2008-04-22 Finisar Corporation Methods of forming vias in multilayer substrates
US7153759B2 (en) 2004-04-20 2006-12-26 Agency For Science Technology And Research Method of fabricating microelectromechanical system structures
US7405466B2 (en) 2004-04-20 2008-07-29 Agency For Science, Technology And Research Method of fabricating microelectromechanical system structures
US7927975B2 (en) 2009-02-04 2011-04-19 Micron Technology, Inc. Semiconductor material manufacture
US8389385B2 (en) 2009-02-04 2013-03-05 Micron Technology, Inc. Semiconductor material manufacture

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