JPS63106025A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To prevent required data from being lost, by detecting the drop of a power source voltage automatically, and generating a the standby state of internal circuits. CONSTITUTION:A holding circuit 1 holds the power source voltage VDD in a prescribed range for a constant period, and outputs the voltage, and a comparator 2 compares the output voltage of the holding circuit 1 with the power source voltage VDD, and when the power source voltage VDD drops below than a voltage set in advance, a voltage drop signal is outputted. A standby control circuit 3 inputs the voltage drop signal, and outputs a standby signal to the internal circuit 4. The internal circuit 4 is constituted including an arithmetic processing part 41, a program counter 42, a ROM circuit 43, an instruction decoder 44, a RAM circuit 45, a register circuit 46, and a bus circuit 47, and stores and processes a prescribed data, and when the standby signal is inputted, it stops a processing operation, and holds the data being stored in a specific storage element to be required for the next processing operation, then the standby state is generated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device, and more particularly to a semiconductor integrated circuit device with an 0MO3 structure having a standby function.

[Conventional technology]

In semiconductor integrated circuit devices, even if the circuit is configured with a 0MO3 structure, the current consumption becomes extremely large due to the increase in circuit scale and the demand for higher speeds, and the operation when switching to a backup power source such as a dry battery becomes difficult. A standby function is provided to reduce current.

In this standby state, operations such as data processing of the semiconductor integrated circuit device are prohibited, and operating current is suppressed by holding only the data necessary for the next operation of the RAM circuit, register circuit, etc.

Conventionally, when switching the power supply to a backup power source, this type of semiconductor integrated circuit device has put internal circuits including RAM circuits and register circuits into standby mode using an external standby control signal. The configuration was such that the power supply was switched after switching to 5.

[Problem that the invention seeks to solve]

The conventional semiconductor integrated circuit device described above has a configuration in which the internal circuit is put into standby state by an external standby control signal and then the power supply is switched to the backup power supply, so the power supply voltage drops significantly due to load fluctuations in the internal circuit. Even if this were the case, there was no means to detect this drop in power supply voltage, and even if the internal circuitry had a margin with respect to the power supply voltage, there was a drawback that necessary data could be lost.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor integrated circuit device that can detect fluctuations in power supply voltage and enter a standby state, and can prevent necessary data from disappearing.

[Means for solving problems]

The semiconductor integrated circuit device of the present invention includes a holding circuit that holds and outputs a power supply voltage within a predetermined range for a predetermined period on one semiconductor substrate, and compares the output voltage of this holding circuit with the power supply voltage. a comparison detection circuit that outputs a power drop signal when the power supply voltage does not drop below a predetermined value; a standby control circuit that inputs the power drop signal and outputs a standby control signal; and a standby control circuit that stores and processes predetermined data. and an internal circuit that stops the data processing operation in response to the standby control signal and stores and holds specific data.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

The holding circuit 1 holds the power supply voltage VDD within a predetermined range for a certain period of time and outputs this voltage.

The comparison detection circuit 2 compares the output voltage of the holding circuit 1 with the power supply voltage V.
DD and outputs a voltage drop signal when the power supply voltage VDD falls below a preset voltage.

The standby control circuit 3 receives the voltage drop signal and outputs a standby control signal to the internal circuit 4.

The internal circuit 4 includes an arithmetic processing section 41. Program counter 42. ROM circuit 43. Instruction decoder 44. RAM circuit 45. It is configured to include a register circuit 46 and a bus circuit 47, and stores and processes predetermined data.
When a standby signal is input, the processing operation is stopped, at least the data stored in a specific storage element necessary for the next processing operation is held, and the apparatus enters a standby state.

Each of the above circuits is constructed on the same semiconductor substrate.

After entering the standby state, the power supply to each of the circuits described above is switched to a backup power supply.

Therefore, it is possible to automatically detect a drop in the power supply voltage V□p and put the internal circuit 4 into a standby state, thereby preventing necessary data from disappearing.

FIG. 2 shows the holding circuit 1 shown in FIG. Comparison detection circuit 2
2 is a circuit diagram showing an example of a standby control circuit 3. FIG.

The holding circuit 1 is composed of a transistor Q+, a resistor R1, and a capacitor C. The holding circuit 1 transmits the power supply voltage DD to the capacitor C1 via the transistor Q+ according to the precharge clock signal Φ3, and holds it within a predetermined range for a certain period of time. and outputs it to the comparison detection circuit 2.

The comparison detection circuit 2 is composed of transistors Q2 to Q8, etc., and compares the voltage VC of the capacitor C1 with the power supply voltage VDo transmitted via the transistor Q8 by the sampling clock signal Φ1.
When the power supply voltage VDD decreases with respect to the voltage determined by the circuit elements constituting the circuit elements and the period of each clock signal, the power supply drop signal VDo is output.

The standby control circuit 3 includes a flip-flop formed of gate elements 01 to G7, a gate circuit, and an inverter 31.
33, etc., and outputs a standby control signal V5c at a predetermined timing when the power supply drop signal VDO is input.

FIG. 3 is a waveform diagram of various signals when the circuit shown in FIG. 2 is operated.

In the comparison and detection circuit 2, the power supply voltage VDD is transmitted through the transistor Q8 to become the voltage VDX, and this voltage VDX is the voltage ■. A voltage drop signal VDO is output. And the inverter 33 of the standby control circuit 3
A standby control signal SC is output from the internal circuit 4.
on standby.

〔Effect of the invention〕

As explained above, the present invention automatically detects a drop in power supply voltage and puts the internal circuit into standby mode.
This has the effect of preventing the loss of necessary data. Furthermore, by providing a holding circuit, the power supply voltage is held for a certain period of time and used as a reference voltage for detecting a drop in the power supply voltage, so there is no need to input a special power source from outside for the reference voltage. .

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, FIG. 2 is a circuit diagram showing an example of the holding circuit, comparison detection circuit, and standby control circuit of the embodiment shown in FIG. 1, and FIG. Second
FIG. 4 is a waveform diagram of signals of various parts when the circuit shown in the figure is operated. DESCRIPTION OF SYMBOLS 1... Holding circuit, 2... Comparison detection circuit, 3... Standby control circuit, 4... Internal circuit, 31-33...
- Inverter, 41... Arithmetic processing unit, 42... Program counter, 43... ROM circuit, 44...
Instruction decoder, 45... RAM circuit, 46... register circuit, 47... bus circuit, C1
...Capacitor, G, ~G7...Gate circuit, Q1
~Q8...transistor, r(l...resistance. Foil 1 Figure

Claims (1)

[Claims] On one semiconductor substrate, there is a holding circuit that holds the power supply voltage within a predetermined range for a predetermined period and outputs it, and compares the output voltage of this holding circuit with the power supply voltage and determines whether the power supply voltage is lower than the predetermined value. a comparison detection circuit that outputs a power drop signal when the power drops; a standby control circuit that inputs the power drop signal and outputs a standby control signal; and a standby control circuit that stores and processes predetermined data and performs processing operations on the data in response to the standby control signal. What is claimed is: 1. A semiconductor integrated circuit device comprising: an internal circuit that stops and stores specific data;