JPS63104361A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS63104361A
JPS63104361A JP61250111A JP25011186A JPS63104361A JP S63104361 A JPS63104361 A JP S63104361A JP 61250111 A JP61250111 A JP 61250111A JP 25011186 A JP25011186 A JP 25011186A JP S63104361 A JPS63104361 A JP S63104361A
Authority
JP
Japan
Prior art keywords
wiring board
substrate
chips
wiring
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61250111A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0533829B2 (enrdf_load_stackoverflow
Inventor
Miyoshi Yoshida
吉田　美義
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP61250111A priority Critical patent/JPS63104361A/ja
Publication of JPS63104361A publication Critical patent/JPS63104361A/ja
Publication of JPH0533829B2 publication Critical patent/JPH0533829B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Wire Bonding (AREA)
  • Combinations Of Printed Boards (AREA)
JP61250111A 1986-10-20 1986-10-20 半導体装置 Granted JPS63104361A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61250111A JPS63104361A (ja) 1986-10-20 1986-10-20 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61250111A JPS63104361A (ja) 1986-10-20 1986-10-20 半導体装置

Publications (2)

Publication Number Publication Date
JPS63104361A true JPS63104361A (ja) 1988-05-09
JPH0533829B2 JPH0533829B2 (enrdf_load_stackoverflow) 1993-05-20

Family

ID=17202988

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61250111A Granted JPS63104361A (ja) 1986-10-20 1986-10-20 半導体装置

Country Status (1)

Country Link
JP (1) JPS63104361A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5362986A (en) * 1993-08-19 1994-11-08 International Business Machines Corporation Vertical chip mount memory package with packaging substrate and memory chip pairs
WO1995008189A1 (en) * 1993-09-14 1995-03-23 Kabushiki Kaisha Toshiba Multi-chip module

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5362986A (en) * 1993-08-19 1994-11-08 International Business Machines Corporation Vertical chip mount memory package with packaging substrate and memory chip pairs
US5397747A (en) * 1993-08-19 1995-03-14 International Business Machines Corporation Vertical chip mount memory package and method
WO1995008189A1 (en) * 1993-09-14 1995-03-23 Kabushiki Kaisha Toshiba Multi-chip module
AU690920B2 (en) * 1993-09-14 1998-05-07 Kabushiki Kaisha Toshiba Multi-chip module
US6147876A (en) * 1993-09-14 2000-11-14 Kabushiki Kaisha Toshiba Multi-chip module having printed wiring board comprising circuit pattern for IC chip
US6418030B1 (en) 1993-09-14 2002-07-09 Kabushiki Kaisha Toshiba Multi-chip module

Also Published As

Publication number Publication date
JPH0533829B2 (enrdf_load_stackoverflow) 1993-05-20

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