JPS63102330A - Inspection apparatus of semiconductor device - Google Patents

Inspection apparatus of semiconductor device

Info

Publication number
JPS63102330A
JPS63102330A JP24874086A JP24874086A JPS63102330A JP S63102330 A JPS63102330 A JP S63102330A JP 24874086 A JP24874086 A JP 24874086A JP 24874086 A JP24874086 A JP 24874086A JP S63102330 A JPS63102330 A JP S63102330A
Authority
JP
Japan
Prior art keywords
ink
chip
electrode
integrated circuit
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24874086A
Other languages
Japanese (ja)
Inventor
Katsuhiko Tsuura
克彦 津浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP24874086A priority Critical patent/JPS63102330A/en
Publication of JPS63102330A publication Critical patent/JPS63102330A/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Ink Jet (AREA)

Abstract

PURPOSE:To enable an ink to be splashed on the surface of a chip without scratching the chip by a method wherein, within an inker applicable to the inspection process of a semiconductor integrated circuit, an electrode is provided on a position between a semiconductor substrate and a dripping end of an ink well to impress the electrode and said dripping end of the ink well with voltage. CONSTITUTION:A cylindrical electrode 7 is provided to be connected to a plus power supply through an electric switch 8 in the end direction of an ink well 3 made of conductive material previously grounded. Probes 2 are brought into contact with an integrated circuit chip surface of a semiconductor substrate 1 and after finishing the inspection process, the switch 8 is closed to impress the electrode 7 with high voltage so that ink may be splashed on the chip surface by an electric field generated between the end of ink well 3 and the electrode 7. Through these procedures, the gap between the end of ink well 3 and the integrated circuit chip on the semiconductor substrate can be adjusted easily so that the ink may be splashed on the chip surface without scratching the chip.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、半導体装置の検査装置、詳しくは、検査装置
用インカーに関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an inspection apparatus for semiconductor devices, and more particularly to an inker for an inspection apparatus.

従来の技術 従来、半導体装置、とくに、集積回路の検査工程におい
て、ウェハ一段階で、電気的な機能検査を、ICテスタ
ーで行ない、所定の機能がない半導体集積回路チップを
不良として認識するために、第2図の概要断面図に示す
ようなインカーで、インクを付着させていた。同図にお
いて、半導体集積回路チップ1に、プローブ2を立てで
、ICテスターと、チップとの電気的な接続を行ない、
電気的な機能検査を行った後不良品の場合、インクつぼ
3の中の針5を電磁コイルを利用した駆動部6により、
下方に動かしてインク4を、半導体基板l上のチップ面
に付着させるものであった。
Conventionally, in the testing process of semiconductor devices, especially integrated circuits, an IC tester is used to conduct electrical function tests at one wafer stage, in order to recognize semiconductor integrated circuit chips that do not have a predetermined function as defective. , ink was applied using an inker as shown in the schematic cross-sectional view of FIG. In the figure, a probe 2 is placed upright on a semiconductor integrated circuit chip 1, and an electrical connection is made between the IC tester and the chip.
If the product is defective after conducting an electrical function test, the needle 5 in the ink fountain 3 is moved by a drive unit 6 using an electromagnetic coil.
The ink 4 was moved downward to adhere to the chip surface on the semiconductor substrate l.

発明が解決しようとする問題点 このような従来の構成では、インクつぼ3の先端の位置
は、測定ウェハーと、一定の距離をあけて、チップの所
定の位置にインクが付着するように設定する必要があっ
た。このインクつぼ3の位置設定は、熟練を要するもの
であり、時間がかかるという問題があった。
Problems to be Solved by the Invention In such a conventional configuration, the position of the tip of the ink fountain 3 is set at a certain distance from the measurement wafer so that ink adheres to a predetermined position on the chip. There was a need. Setting the position of the ink fountain 3 requires skill and is time consuming.

また、インクを半導体集積回路の基板1上のチップ面に
付着させる時、インカーの針5が、半導体基板1のチッ
プ面に接触することがあると、同チップ面の配線が切断
されたり、同チップ面の保護膜にクラックが入ったりす
ることがある。それゆえ、不良チップにインクを付着さ
せるのとは逆に、良品チップにインクを付着させて良品
を認識するのに用いる場合には、このような検査装置の
利用は不可能であるという問題があった。
Furthermore, when applying ink to the chip surface of the semiconductor integrated circuit substrate 1, if the inker needle 5 comes into contact with the chip surface of the semiconductor substrate 1, the wiring on the chip surface may be cut or the same may occur. Cracks may appear in the protective film on the chip surface. Therefore, there is a problem in that it is impossible to use such an inspection device when it is used to recognize good chips by applying ink to good chips, as opposed to applying ink to defective chips. there were.

問題点を解決するための手段 この問題点を解決するために本発明は、半導体装置の検
査工程に使用するインカーにおいて、インクつぼを一つ
の電極とするとともに、他方の電極をインクつぼの先端
方向に設けたものである。
Means for Solving the Problem In order to solve this problem, the present invention provides an inker used in the testing process of semiconductor devices, in which the ink fountain is used as one electrode, and the other electrode is connected toward the tip of the ink fountain. It was established in

作用 この構成により、インクっぽの先端部にあるインクは、
インクつぼの先端方向にある電極に加わった電圧による
電界によってインクっぽの先端部から飛び出し、チップ
にインクを付着させることができる。
Effect: With this configuration, the ink at the tip of the inky tip is
The electric field generated by the voltage applied to the electrodes toward the tip of the inkpot allows ink to fly out from the tip of the inkpot and adhere to the tip.

実施例 第1図は本発明の一実施例による半導体集積回路の検査
装置の概要断面図であり、導電性の材質でできたインク
っぽ3を接地しておき、インクっぽの先端方向に円筒形
の電極7を設け、電気スイッチ8を経て、プラス電源に
接続したものである。半導体基板1の集積回路チップ面
に、プローブ2をあて、検査後、インク4をチップに付
着させる場合スイッチ8を閉じて、電極7に高電圧を印
加し、インクつぼ3の先端部と、電極7との間にできる
電界により、インクがインクつぼ3より飛び出し、チッ
プ面にインク4を付着させるようにしたものである。
Embodiment FIG. 1 is a schematic cross-sectional view of a semiconductor integrated circuit testing apparatus according to an embodiment of the present invention, in which an ink tip 3 made of a conductive material is grounded and A cylindrical electrode 7 is provided and connected to a positive power source via an electric switch 8. If the probe 2 is applied to the integrated circuit chip surface of the semiconductor substrate 1 and the ink 4 is applied to the chip after inspection, the switch 8 is closed and a high voltage is applied to the electrode 7. Due to the electric field created between the ink and the ink fountain 7, the ink is ejected from the ink fountain 3 and the ink 4 is attached to the chip surface.

発明の効果 以上のように本発明によれば、インクつぼの先端と、半
導体基板上の集積回路チップとの距離の調整が容易であ
り、また、チップにきすを与えずにインクをチップに付
着させることが可能となる。
Effects of the Invention As described above, according to the present invention, the distance between the tip of the ink fountain and the integrated circuit chip on the semiconductor substrate can be easily adjusted, and ink can be attached to the chip without causing scratches on the chip. It becomes possible to do so.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例による半導体集積回路の検査
装置を示す概要断面図、第2図は従来の半導体集積回路
の検査装置を示す概要断面図である。 1・・・・・・半導体基板、2・・・・・・プローブ、
3・・・・・・インクつぼ、4・・・・・・インク、7
・・・・・・電極、8・・・・・・スイッチ。 代理人の氏名 弁理士 中尾敏男 はが1名イ°−“を
埠4ト第4々 2−−−7加−グ′ 第 1 図                3゛−イ
〉クツ(!゛ンク一一ノミ1シ締
FIG. 1 is a schematic sectional view showing a semiconductor integrated circuit testing apparatus according to an embodiment of the present invention, and FIG. 2 is a schematic sectional view showing a conventional semiconductor integrated circuit testing apparatus. 1... Semiconductor substrate, 2... Probe,
3... Ink pot, 4... Ink, 7
...electrode, 8...switch. Name of agent Patent attorney Toshio Nakao Tighten

Claims (1)

【特許請求の範囲】[Claims] 半導体集積回路の検査工程に使用するインカーにおいて
、滴下端部を有するインクつぼの前記滴下端と半導体基
板との間に電極をもうけ、同電極とインクつぼの先端と
の間に電圧を印加することによってインクを飛ばすこと
を特徴とする半導体装置の検査装置。
In an inker used in the testing process of semiconductor integrated circuits, an electrode is provided between the dropping end of an ink fountain having a dripping end and a semiconductor substrate, and a voltage is applied between the electrode and the tip of the ink fountain. An inspection device for semiconductor devices characterized by spraying ink by spraying the ink.
JP24874086A 1986-10-20 1986-10-20 Inspection apparatus of semiconductor device Pending JPS63102330A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24874086A JPS63102330A (en) 1986-10-20 1986-10-20 Inspection apparatus of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24874086A JPS63102330A (en) 1986-10-20 1986-10-20 Inspection apparatus of semiconductor device

Publications (1)

Publication Number Publication Date
JPS63102330A true JPS63102330A (en) 1988-05-07

Family

ID=17182658

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24874086A Pending JPS63102330A (en) 1986-10-20 1986-10-20 Inspection apparatus of semiconductor device

Country Status (1)

Country Link
JP (1) JPS63102330A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19523597A1 (en) * 1995-06-30 1997-01-02 Hans Damm Window of module housing opaque covering method for UV-EPROM

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55165648A (en) * 1979-06-12 1980-12-24 Nec Corp Method of sorting and inspecting semiconductor device
JPS58139437A (en) * 1982-02-15 1983-08-18 Nec Home Electronics Ltd Sorting and indicating method for semiconductor element

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55165648A (en) * 1979-06-12 1980-12-24 Nec Corp Method of sorting and inspecting semiconductor device
JPS58139437A (en) * 1982-02-15 1983-08-18 Nec Home Electronics Ltd Sorting and indicating method for semiconductor element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19523597A1 (en) * 1995-06-30 1997-01-02 Hans Damm Window of module housing opaque covering method for UV-EPROM

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