JPS63100796A - Manufacture of fluorine resin multilayer printed board - Google Patents

Manufacture of fluorine resin multilayer printed board

Info

Publication number
JPS63100796A
JPS63100796A JP61246546A JP24654686A JPS63100796A JP S63100796 A JPS63100796 A JP S63100796A JP 61246546 A JP61246546 A JP 61246546A JP 24654686 A JP24654686 A JP 24654686A JP S63100796 A JPS63100796 A JP S63100796A
Authority
JP
Japan
Prior art keywords
printed board
fluororesin
multilayer printed
board
melting point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61246546A
Other languages
Japanese (ja)
Inventor
富沢 茂
雄二 渡辺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP61246546A priority Critical patent/JPS63100796A/en
Publication of JPS63100796A publication Critical patent/JPS63100796A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676Single layer compositions

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔概要〕 電子機器等の電気回路に用いられる弗素樹脂多層プリン
ト板の製造方法であって、弗素樹脂多層プリント板の積
層に際して、弗素樹脂で形成された各プリント板と、前
記各プリント板間に設けられた接着層との間に前記プリ
ント板の弗素樹脂の融点より低い融点を持った弗素樹脂
層を設け、該低融点の弗素樹脂を熔融してプリント板間
を接着して積層することにより、弗素樹脂プリント板の
軟化や流動を無くし、回路パターンの位置変動や厚さ方
向の眉間板厚のバラツキを防止して高品質の弗素樹脂多
層プリント板を得ることを可能とする。
[Detailed Description of the Invention] [Summary] A method for manufacturing a fluororesin multilayer printed board used for electric circuits of electronic devices, etc., in which each printed board formed of a fluororesin and , a fluororesin layer having a melting point lower than the melting point of the fluororesin of the printed board is provided between the adhesive layer provided between each of the printed boards, and the fluororesin having a low melting point is melted to form a bond between the printed boards. By bonding and laminating, we can eliminate softening and flow of the fluororesin printed board, prevent changes in the position of the circuit pattern and variations in glabellar board thickness in the thickness direction, and obtain a high quality fluororesin multilayer printed board. possible.

〔産業上の利用分野〕[Industrial application field]

本発明は弗素樹脂多層プリント板の製造方法に係り、特
に弗素樹脂多層プリント板を積層するに際し、回路パタ
ーンの位置変動や厚さのバラツキを防することが出来る
弗素樹脂多層プリント板の製造方法に関するものである
The present invention relates to a method for manufacturing a fluororesin multilayer printed board, and more particularly to a method for manufacturing a fluororesin multilayer printed board that can prevent variations in the position of circuit patterns and thickness variations when laminating fluororesin multilayer printed boards. It is something.

弗素樹脂を使った多層プリント板は、低い誘電率と高い
絶縁性を有しているため、高速コンピュータ等の電子機
器の電気回路や高周波回路等に多く用いられており、I
!a器の高性能化に伴ってプリント板に形成される回路
パターンは高密度化されるとともに、その寸法も高精度
となっている。
Multilayer printed boards using fluororesin have low dielectric constant and high insulation properties, so they are often used in electrical circuits and high frequency circuits of electronic devices such as high-speed computers.
! As the performance of A-devices has improved, the circuit patterns formed on printed boards have become denser and their dimensions have become more precise.

そこで、弗素樹脂多層プリント板を形成するに際し、弗
素樹脂多層プリント板を形成する各弗素樹脂プリント板
間の回路パターンの位置や板厚を高い精度で積層する必
要があり、それがための製造方法の出現が要望されてい
る。
Therefore, when forming a fluororesin multilayer printed board, it is necessary to laminate the circuit patterns and board thicknesses with high precision between each fluororesin printed board that forms the fluororesin multilayer printed board. is desired to appear.

〔従来の技術〕[Conventional technology]

第2図は従来の弗素樹脂多層プリント板の積層を説明す
るための断面図を示している。
FIG. 2 shows a cross-sectional view for explaining the lamination of a conventional fluororesin multilayer printed board.

第2図に示すように、弗素樹脂多層プリント板(以後多
層プリント板と記す)lは、それぞれが弗素樹脂で形成
された最上層プリント板2と、最下層プリント板3と、
前記両プリント板間に中間層プリント板4−1〜4−n
を有し、各プリント板間には接着層としてポリテトラ弗
化エチレン樹脂(以後PTFEと記す)8を含浸したガ
ラス布5−1〜5−nが設けられている。
As shown in FIG. 2, a fluororesin multilayer printed board (hereinafter referred to as a multilayer printed board) l includes a top layer printed board 2, a bottom layer printed board 3, each made of fluororesin.
Intermediate printed boards 4-1 to 4-n between the two printed boards
Glass cloths 5-1 to 5-n impregnated with polytetrafluoroethylene resin (hereinafter referred to as PTFE) 8 are provided between each printed board as an adhesive layer.

多層プリントFilの積層は、各プリント板に設けられ
た基準孔を81層ゲージ6の基準ピン7−1〜?−nに
嵌入して順次積層し、各プリント板間の積層位置を規定
した状態で、上方向から積層ゲージ6′を加圧して多層
プリント板lの厚さ寸法を規定するとともに、PTFE
が熔融する330゜Cで加熱し、接着層のガラス布5−
1〜5−nに含浸されている熱可塑性のPTFEBを熔
融してガラス布5−1〜5−nと各プリント板間に充填
する。この充填したP ′T” F E Bは、多層プ
リント板lが常温に戻ると硬化して各プリント板間を接
着する。
Lamination of the multilayer printed film is performed by connecting the reference hole provided in each printed board to the reference pin 7-1 of the 81-layer gauge 6. -n and stack them one after another, and with the lamination position between each printed board defined, pressurize the lamination gauge 6' from above to define the thickness dimension of the multilayer printed board l.
Heating at 330°C to melt the adhesive layer glass cloth 5-
The thermoplastic PTFEB impregnated with glass cloths 5-1 to 5-n is melted and filled between the glass cloths 5-1 to 5-n and each printed board. When the multilayer printed board 1 returns to room temperature, the filled P'T''FEB hardens and bonds the printed boards together.

なお、ガラス布5−1〜5−nは多層プリント板lの強
度を強くするために用いられている。
Note that the glass cloths 5-1 to 5-n are used to increase the strength of the multilayer printed board 1.

(発明が解決しようとする問題点〕 上記の多層プリント板を形成する弗素樹脂は、熱可塑性
であるため、エポキシ、ポリイミドと言った様な樹脂と
異なり成形時に熱硬化反応を示さない性質を有している
。従って、多層化時に接着層に各プリント板と同等の融
点を持ったPTFEBを使った場合、PTFEBの溶融
時に各プリント板が軟化して流動を始める。この結果、
各プリント板に形成された回路パターン9−1〜9−n
の位置精度が悪化するとともに、厚さ方向における眉間
板厚にバラツキが生じるといった問題がある。
(Problems to be Solved by the Invention) The fluororesin used to form the above-mentioned multilayer printed board is thermoplastic, so unlike resins such as epoxy and polyimide, it does not exhibit a thermosetting reaction during molding. Therefore, if PTFEB, which has the same melting point as each printed board, is used for the adhesive layer during multilayering, each printed board will soften and begin to flow when the PTFEB melts.As a result,
Circuit patterns 9-1 to 9-n formed on each printed board
There are problems such as deterioration of positional accuracy and variation in glabellar plate thickness in the thickness direction.

本発明はこのような点に鑑みt創作されたもので、積層
時に回路パターンが高い位置精度を保持するとともに、
バラツキの無い板厚が得られる弗素樹脂多層プリント板
の製造方法を提供することを目的としている。
The present invention was created in view of the above points, and the present invention maintains high positional accuracy of the circuit pattern during lamination, and
It is an object of the present invention to provide a method for manufacturing a fluororesin multilayer printed board that provides a uniform board thickness.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は上記の問題点を解消するため、多層プリント板
の各プリント板と各プリント板間に設けられた接着層と
の間にプリント板を形成する弗素樹脂よりも低融点の弗
素樹脂を設け、前記低融点の弗素樹脂を低温度で溶融し
てプリント板間を接着、積層する構成としている。
In order to solve the above problems, the present invention provides a fluororesin having a lower melting point than the fluororesin forming the printed board between each printed board of a multilayer printed board and the adhesive layer provided between each printed board. , the printed boards are bonded and laminated by melting the low melting point fluororesin at a low temperature.

〔作用〕[Effect]

接着層と各プリント板との間に設けられた低融点の弗素
樹脂を各プリント板を形成する弗素樹脂の融点よりも低
い温度で溶融して各プリント板間を接着することにより
、従来の高温加熱による弗素樹脂プリント板の軟化や流
動が無くなり、回路パターンの位置の変動や厚さ方向に
おける眉間板厚のバラツキを防止する。
By melting the low-melting-point fluororesin provided between the adhesive layer and each printed board at a temperature lower than the melting point of the fluororesin that forms each printed board, and bonding each printed board together, it is possible to achieve a higher temperature than conventional high temperature. There is no softening or flow of the fluororesin printed board due to heating, preventing variations in the position of the circuit pattern and variations in the glabellar board thickness in the thickness direction.

〔実施例〕〔Example〕

第1図は本発明の一実施例の弗素樹脂多層プリント板の
断面図を示しており、説明を容易とするため、第2図と
同一部位は同一符号をもって示している。
FIG. 1 shows a sectional view of a fluororesin multilayer printed board according to an embodiment of the present invention, and for ease of explanation, the same parts as in FIG. 2 are designated by the same reference numerals.

第1図に示すように、一実施例の多層プリント板は、各
プリント板と接着層であるP ’I’ F E Bが含
浸されたガラス布5−1〜5−nとの間にポリテトラク
ロロエチレンの側鎖にアルコキシ基(−R−0−)が結
合したパーフルオロアルコキシ−樹脂(以後PFAと記
す) 10を設けた構成とじている。
As shown in FIG. 1, the multilayer printed board of one embodiment has polyester between each printed board and glass cloth 5-1 to 5-n impregnated with P'I'FEB, which is an adhesive layer. The structure includes a perfluoroalkoxy resin (hereinafter referred to as PFA) 10 in which an alkoxy group (-R-0-) is bonded to the side chain of tetrachloroethylene.

このPFAloは融点が300°C〜310″Cの熱可
塑性樹脂であり、各プリント板を形成する弗素樹脂の融
点(327°C)より約27°Cから17°C低い融点
を有している。
PFAlo is a thermoplastic resin with a melting point of 300°C to 310''C, which is approximately 27°C to 17°C lower than the melting point (327°C) of the fluororesin that forms each printed board. .

そこで、多層プリント板lの積層時の加熱温度を300
°C〜310°C内に設定することにより、PFAIO
が溶融して各プリント板が接着される。
Therefore, the heating temperature when laminating the multilayer printed board l was set to 300.
By setting within °C ~ 310 °C, PFAIO
is melted and each printed board is adhered.

一方、各プリント板を形成する弗素樹脂は、前記の30
0 ” C〜310°Cの加熱温度においては軟化する
といった影響が無く、積層時での各プリント板の回路位
置精度の悪化や厚さ方向における眉間板厚のバラツキが
発生しない。
On the other hand, the fluororesin forming each printed board is
At heating temperatures of 0''C to 310C, there is no effect of softening, and there is no deterioration in circuit position accuracy of each printed board during lamination, and no variation in glabellar board thickness in the thickness direction.

なお、上記実施例では低融点の弗素樹脂にパーフルオロ
アルコキシ−樹脂(PFA)t−用いているが、それに
代わって4弗化エチレンと6弗化プロピレンの共重合体
(FEP)やクロロトリオロエチレン(CTFE)を用
いても同様の効果が得られる。
In the above examples, perfluoroalkoxy resin (PFA) is used as the low melting point fluororesin, but instead, a copolymer of tetrafluoroethylene and hexafluoropropylene (FEP) or chlorotrifluorocarbon resin is used. Similar effects can be obtained using ethylene (CTFE).

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、積層時において、
回路パターンの位置変動や厚さ方向における眉間板厚の
バラツキの発生が防止され、高品質の弗素樹脂多層プリ
ント板が得られる。
As explained above, according to the present invention, during lamination,
A high-quality fluororesin multilayer printed board can be obtained by preventing positional fluctuations in the circuit pattern and variations in glabellar board thickness in the thickness direction.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の弗素樹脂多層プリント板の
断面図、 第2図は従来の弗素樹脂多層プリント板の接層を説明す
るための断面図である。
FIG. 1 is a sectional view of a fluororesin multilayer printed board according to an embodiment of the present invention, and FIG. 2 is a sectional view for explaining the contact layers of a conventional fluororesin multilayer printed board.

Claims (1)

【特許請求の範囲】  弗素樹脂素材で形成された各プリント板(2、3、4
−1〜4−n)を弗素樹脂からなる接着層(5−1〜5
−n)を介して積層する多層プリント板(1)の製造方
法において、 前記接着層(5−1〜5−n)と前記各プリント板(2
、3、4−1〜4−n)との間に前記プリント板(2、
3、4−1〜4−n)を形成する弗素樹脂の融点より低
融点の弗素樹脂層(10)を設け、該低融点の弗素樹脂
を溶融して積層成形することを特徴とする弗素樹脂多層
プリント板の製造方法。
[Claims] Each printed board (2, 3, 4) formed of a fluororesin material
-1 to 4-n) to adhesive layers (5-1 to 5) made of fluororesin.
-n), in which the adhesive layer (5-1 to 5-n) and each of the printed boards (2
, 3, 4-1 to 4-n), the printed board (2,
3, a fluororesin layer (10) having a melting point lower than that of the fluororesin forming 4-1 to 4-n) is provided, and the fluororesin having a low melting point is melted and laminated to form a fluororesin. Method for manufacturing multilayer printed boards.
JP61246546A 1986-10-16 1986-10-16 Manufacture of fluorine resin multilayer printed board Pending JPS63100796A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61246546A JPS63100796A (en) 1986-10-16 1986-10-16 Manufacture of fluorine resin multilayer printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61246546A JPS63100796A (en) 1986-10-16 1986-10-16 Manufacture of fluorine resin multilayer printed board

Publications (1)

Publication Number Publication Date
JPS63100796A true JPS63100796A (en) 1988-05-02

Family

ID=17150018

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61246546A Pending JPS63100796A (en) 1986-10-16 1986-10-16 Manufacture of fluorine resin multilayer printed board

Country Status (1)

Country Link
JP (1) JPS63100796A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02173697A (en) * 1988-12-26 1990-07-05 Yamaha Corp Electronic musical instrument
JPH03273697A (en) * 1990-03-23 1991-12-04 Nippon Avionics Co Ltd Multilayer printed-wiring board with inner via hole
JP2003082301A (en) * 2001-09-10 2003-03-19 Japan Gore Tex Inc Adhesive tape and semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02173697A (en) * 1988-12-26 1990-07-05 Yamaha Corp Electronic musical instrument
JPH03273697A (en) * 1990-03-23 1991-12-04 Nippon Avionics Co Ltd Multilayer printed-wiring board with inner via hole
JP2003082301A (en) * 2001-09-10 2003-03-19 Japan Gore Tex Inc Adhesive tape and semiconductor device

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