JPS6299815U - - Google Patents

Description

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of this invention, FIG. 2 is a block diagram showing another embodiment of this invention, and FIG. 3 is a block diagram showing an example of a conventional resolver signal testing device. In the figure, 3A and 3B are square circuits, 4 is an addition circuit, 5 is a constant voltage circuit, 6 is a comparison circuit, 7A and 7B
is a rectifier circuit. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Scope of utility model registration request] The angular frequency of the alternating current applied to the resolver is ω, the rotation angle from the reference angle of the resolver is θ, and the sin signal output from this resolver is Esin
ωtsinθ, cos signal as Esinωtcos
θ, means for detecting the peak value E ² sin ² θ of the square of the sin signal using a first cascade circuit in which a square circuit and a rectifier circuit are connected in cascade; means for detecting the square peak value E ² cos ² θ of the cos signal using a second cascade circuit in which the circuit and the rectifier circuit are connected in cascade;
an adder circuit that adds the output E ² sin ² θ of the cascade circuit and the output E ² cos ² θ of the second cascade circuit, a constant voltage circuit that outputs a constant voltage, the output of the adder circuit and the constant voltage circuit A resolver signal detection device equipped with a comparison circuit that compares the outputs of.