JPS6298245U - - Google Patents

Info

Publication number
JPS6298245U
JPS6298245U JP19020285U JP19020285U JPS6298245U JP S6298245 U JPS6298245 U JP S6298245U JP 19020285 U JP19020285 U JP 19020285U JP 19020285 U JP19020285 U JP 19020285U JP S6298245 U JPS6298245 U JP S6298245U
Authority
JP
Japan
Prior art keywords
sockets
integrated circuit
utility
electrically connecting
registration request
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19020285U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP19020285U priority Critical patent/JPS6298245U/ja
Publication of JPS6298245U publication Critical patent/JPS6298245U/ja
Pending legal-status Critical Current

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  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の集積回路パツケージの外観図
、第2図は本考案の実施例の縦断面図、第3図は
本考案を適用する回路図、第4図イ、ロは本考案
の実施例の横断面図である。 1,1′……集積回路装置、1a,1a′……
パツケージ本体、2,2′……チツプ、10……
2つの集積回路装置に印加される共通信号、20
,30……2つの集積回路装置の個個に印加され
る信号、40,41,42…,40′,41′,
42′……ソケツト、50,51,52…,50
′,51′,52′……入出力端子、60,61
……スルーホール、80,81……チツプ端子。
Fig. 1 is an external view of the integrated circuit package of the present invention, Fig. 2 is a longitudinal cross-sectional view of an embodiment of the present invention, Fig. 3 is a circuit diagram to which the present invention is applied, and Fig. 4 A and B are diagrams of the present invention. FIG. 3 is a cross-sectional view of the embodiment. 1, 1'... integrated circuit device, 1a, 1a'...
Package body, 2, 2'...chip, 10...
common signal applied to two integrated circuit devices, 20
, 30... Signals applied to each of the two integrated circuit devices, 40, 41, 42..., 40', 41',
42'...Socket, 50, 51, 52..., 50
', 51', 52'...Input/output terminal, 60, 61
...Through hole, 80, 81...Chip terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数のソケツトと、該ソケツトの直下に位置し
搭載基板と電気的接続を行なうための接続ピンと
をパツケージ本体に設けたことを特徴とする集積
回路パツケージ。
An integrated circuit package characterized in that a package body is provided with a plurality of sockets and connection pins located directly below the sockets for electrically connecting with a mounting board.
JP19020285U 1985-12-10 1985-12-10 Pending JPS6298245U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19020285U JPS6298245U (en) 1985-12-10 1985-12-10

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19020285U JPS6298245U (en) 1985-12-10 1985-12-10

Publications (1)

Publication Number Publication Date
JPS6298245U true JPS6298245U (en) 1987-06-23

Family

ID=31143205

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19020285U Pending JPS6298245U (en) 1985-12-10 1985-12-10

Country Status (1)

Country Link
JP (1) JPS6298245U (en)

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