JPS6295832A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent an impurity from permeating into a substrate by a method wherein opening edge parts of porous CVD oxide films are completely covered with plasma nitride films to completely cut off the impurity by the plasma nitride films. CONSTITUTION:Opening edge parts 6a of plasma nitride films 6 are positioned at inner peripheral side than opening edge parts 5a of CVD oxide film 5 to be formed into proper opening dimensions. The opening edge parts 6a are directly brought into contact with the surface of an electrode pad 3. Resultantly. The opening edge parts 5a of oxide films 5 are completely covered with the opening edge parts 6a of nitride films 6 to be prevented from being exposed to the atmosphere. Naturally, even if any impurity such as water content etc. is permeated into the electrode pad 3, the impurity can not be directly brought into contact with the oxide films 5. Through these procedures, the impurity can be completely cut off by the nitride films 6 to be prevented from permeating into a semiconductor substrate.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a structure for improving moisture resistance in a semiconductor device having metal electrode pads.

[Conventional technology]

Generally, a semiconductor device is provided with an electrode pad made of a metal material, and is also provided with a structure for improving the moisture resistance of the semiconductor device itself. For example, FIG. 2(a),
In the conventional semiconductor device shown in (b), an electrode pad 13 and a lead-out wiring 14 connected to the electrode pad 13 are formed of metal such as aluminum on a thermal oxide film 12 on the surface of a semiconductor substrate 11, and grown on this by a CVD method. Oxide film 15 and plasma C
It is formed by laminating a plasma nitride film 16 grown by the VD method. By opening these CVD oxide film 15 and plasma nitrided film 16 above electrode pad 13, electrode pad 13 is exposed within this opening 17, and electrical connection with the outside is made possible.

The plasma nitride film 16 is provided to prevent moisture from entering the semiconductor substrate 11. Furthermore, the CVD oxide film 15 is
This is provided to prevent problems that may occur when the plasma nitride film 16 is deposited on the electrode pad 13, such as fluctuations in the threshold voltage Va of an N-channel MO3 field effect transistor.

[Problem that the invention seeks to solve]

In the conventional semiconductor device described above, since the CVD oxide film 15 and the plasma nitride film 16 are pattern-etched integrally to form the opening 17, a portion of the CVD oxide film 15 is exposed on the side surface of the opening 17. It is said that the structure is Therefore, when impurities such as moisture enter the opening 17, this impurity permeates through the porous CVD oxide film 15 by capillary action, and passes through the electrode pad 13 as well as through the path A shown in the figure. It even reaches the electrode lead wiring 14 and corrodes them. According to data from actual products, it has been found that corrosion on the narrow lead wiring 14 has a greater effect than on the electrode pad 13, and has a fatal effect on the moisture resistance of the semiconductor device. There is.

In other words, in conventional semiconductor devices, the CVD oxide film provided to prevent variations in electrical characteristics actually causes deterioration of the moisture resistance of the semiconductor device.

[Means for solving problems]

In the semiconductor device of the present invention, in order to eliminate moisture resistance deterioration caused by the CVD oxide film, the semiconductor device exposes the electrode pad.
The opening edge of the plasma nitride film is arranged at a position on the inner peripheral side than the opening edge of the VD oxide film, and the opening edge of the plasma nitride film is brought into direct contact with the electrode pad surface to form the opening of the CVD oxide film. The edge is covered so that the edge of the opening of the CVD oxide film is not exposed.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) and 1(b) are a plan view and a sectional view taken along the line BB of an embodiment of the present invention. An insulating film 2 made of a thermal oxide film is formed on the surface of a semiconductor substrate 1 such as a silicon single crystal substrate, and an electrode pad 3 made of a metal material such as aluminum and an interconnection wiring 4 connected thereto are formed on the insulating film 2 in a predetermined planar pattern. It is formed into a shape. It goes without saying that this lead wire 4 is electrically connected to an internal circuit, etc. not shown.

Then, on the electrode pad 3 and the lead wiring 4, a CV
It is formed by laminating a D oxide film 5 and a plasma nitride film 6. This plasma nitride film 6 serves as a passivation film to protect the semiconductor substrate 1 etc. from external impurities such as moisture.
As before, the purpose is to prevent variations in characteristics of elements such as type 3 field effect transistors.

Then, predetermined portions of the CVD oxide film 5 and plasma nitride film 6 are opened and lowered to expose the electrode pad 3, which is configured as a bonding pad. Here, in the present invention, the opening edge 5a of the CVD oxide film 5 is arranged at a slightly outer peripheral position than the original opening edge position of the electrode pad 3. In this example, the opening edge 5a is configured to have a large opening size to the extent that the opening edge 5a is completely removed from above the electrode pad 3.

On the other hand, the opening edge 6a of the plasma nitride film 6 is
The opening edge 5a of the D oxide film 5 is located on the inner circumferential side and has the original opening size, and this opening edge 6a
is configured to directly contact the surface of the electrode pad 3. As a result, the plasma nitride film 6 completely covers the opening edge 5a of the CVD oxide film 5 at the opening edge 6, thereby preventing the opening edge 5a from being exposed.

According to this configuration, since the opening edge 5a of the porous CVD oxide film 5 is completely covered with the plasma nitride film 6, even if impurities such as moisture enter the electrode pad 3, this impurity will be directly absorbed. The impurities do not touch the CVD oxide film 5, and are therefore completely blocked by the plasma nitride film 6, preventing them from entering the semiconductor substrate 1 and the like. This makes it possible to prevent impurities from entering the lead wiring 4, thereby preventing corrosion thereof and effectively preventing deterioration of the performance of the semiconductor device. Furthermore, since the CVD oxide film 5 exists under the plasma nitride film 6 in the device region other than the electrode pad 3, it goes without saying that variations in device characteristics can be effectively prevented.

Note that in this structure, the CVDM film 5 and the plasma nitride film 6
The opening process will be performed separately for each.

For example, after growing the CVD oxide film 5, open etching is performed using a mask with larger dimensions than before, and then the plasma nitride film 6 is grown. A process of performing open-loop etching can be adopted.

〔Effect of the invention〕

As explained above, the present invention arranges the opening edge of the plasma nitride film at a position on the inner peripheral side of the opening edge of the CVD oxide film that exposes the electrode pad, and CVD is performed by directly contacting the electrode pad surface.
Since the opening edges of the oxide film are covered and the opening edges of this CVD oxide film are not exposed, impurities such as moisture that have entered the electrode pad will not come into direct contact with the CVD oxide film. Therefore, impurities will not be transmitted through the CVD oxide film to the lead wiring, and corrosion of the lead wiring can be prevented and performance deterioration can be effectively prevented. Furthermore, since the CVD oxide film exists under the plasma nitride film in the element region, there is no possibility of variations in the characteristics of the element.

[Brief explanation of drawings]

Fig. 1 shows one embodiment of the present invention, Fig. 1(a) is a plan view, Fig. 2(b) is a sectional view taken along the line BB, Fig. 2 shows a conventional structure, and Fig. 2(a) is a plan view. , (b) is a sectional view taken along the line BB. ■, 11... Semiconductor substrate, 2, 12... Thermal oxide film (
insulating film), 3.13...electrode pad, 4,14...
Extraction wiring, 5, 15...CVD oxide film, 5a...
・Opening edge, 6.16... plasma nitride film, 6a...
- Opening edge, 7, 17... opening. Figure 1 (a) Figure 1 (b) Figure 2 (a) Figure 2 (b)

Claims (1)

[Claims] 1. In a semiconductor device in which an electrode pad connected to an extraction wiring is formed on an insulating film of a semiconductor substrate, a CVD oxide film and a plasma nitride film are laminated thereon, and these are opened, the electrode pad is exposed. CVD for
The opening edge of the plasma nitride film is arranged at a position on the inner circumferential side than the opening edge of the oxide film, and the opening edge of the plasma nitride film is brought into direct contact with the electrode pad surface.
1. A semiconductor device characterized in that the opening edge of the D oxide film is covered so that the opening edge of the CVD oxide film is not exposed.