JPS628990B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic gain control circuit for a video signal processing circuit in a video signal recording and reproducing apparatus such as a VTR.

In the past, AGC circuits added pulses of constant amplitude to the pedestal portion of the video signal to make the amplitude of the signal constant. There was a problem that the amount of frequency deviation could not be kept within a certain value. This will be explained in detail below using figures.

FIG. 1 shows a block diagram of an example of a conventional AGC circuit.

A composite video signal as shown in FIG. On the other hand, a horizontal synchronizing signal is applied from the input terminal 7 through the delay circuit 8 to the constant amplitude pulse generation circuit 9 to obtain a constant amplitude delayed pulse as shown in FIG. 2B. This delayed pulse is added to the above-mentioned composite video signal in the adder circuit 5,
An addition signal as shown in FIG. 2C is obtained. In this case, in the addition signal, the delayed pulse has a polarity opposite to that of the synchronization signal and has a level higher than the white peak level of the luminance signal. This added signal is then supplied to the peak value detection circuit 6 as shown in FIG.
The peak value is detected as shown by the dashed line, and this peak value detection output is connected to the gain control circuit 2 as its control signal, and the AGC circuit works so that the sum of the synchronization signal and the constant amplitude pulse becomes constant. . Therefore, the luminance signal of the composite video signal input to input terminal 1
If the ratio of the signal level and the synchronization signal level is the specified value, that is, 7/3, or if it is smaller than the specified value,
The output of the peak value detection circuit 6, that is, the control signal, is proportional to the level of the synchronizing signal, and a composite video signal with a constant amplitude of the synchronizing signal is taken out at the output terminal 4.

In addition, if the ratio of the luminance signal level and synchronization signal level of the composite video signal input to input terminal 1 is larger than the specified value and the amplitude of the luminance signal is large, the second
Detected as shown by the dashed line in Figure D, the control signal is proportional to the level of the composite video signal.
A composite video signal having a constant amplitude is outputted to the output terminal 4 . In this way, no matter what composite video signal is input to the input terminal 1, a composite video signal exceeding a certain amplitude will not be output to the output terminal 4.

However, in the recording circuit of a magnetic recording/reproducing device,
When adjusting the AGC output level so that the amount of frequency deviation of the output of a frequency modulator becomes a specified value as in an AGC circuit, there are the following drawbacks.

The output level of the AGC circuit that provides a specified amount of frequency deviation to the output of the frequency modulator needs to be adjusted depending on variations in the voltage-to-frequency conversion sensitivity of the modulator. Therefore, the amplitude of the constant-amplitude delayed pulse added in addition circuit 5 in Figure 1 is equivalent to the white peak level when the output level of the AGC circuit is adjusted to the maximum, considering variations in the modulator, etc. Must be set.

The reason for this is explained below. Figure 3A shows an AGC that provides a specified frequency deviation amount to the output of the frequency modulator.
This shows an added signal when the modulator varies in the direction where the output level of the circuit is maximized and the amplitude of the delayed pulse to be added is smaller than the white peak level. This added signal is subjected to peak value detection in the peak value detection circuit 6 as shown by the dashed line in FIG. 3A. Therefore, in bright video content, even if the ratio of the luminance signal level of the input composite video signal to the synchronization signal level is a specified value, the synchronization signal level will change depending on the video content. Therefore, as mentioned earlier, the amplitude of the delayed pulse to be added is
It is necessary to set it equal to the white peak level when the output level of the circuit fluctuates to the maximum.

Next, assume that the amplitude of the delayed pulse is set as described above. FIG. 3B shows the added signal when the modulator varies in the direction where the output level of the AGC circuit that provides a prescribed frequency deviation amount to the output of the frequency modulator is minimized. This added signal is subjected to peak value detection in the peak value detection circuit 6 as shown by the dashed line in FIG. A composite video signal with a constant signal amplitude is extracted. However, this occurs when the value of the ratio between the luminance signal level and the synchronization level of the input composite video signal is equal to or smaller than the specified value, and when the value of this ratio is larger than the specified value, the following problem occurs.

When a composite video signal in which the ratio of the luminance signal level and the synchronization signal level is larger than the specified value is input to input terminal 1, the equilibrium state of the AGC circuit is such that the sum of the luminance signal and the synchronization signal is constant. is maintained.

The addition signal in this state is shown in FIG. 3C. As can be seen by comparing Figures B and C in Figure 3, the level of the composite video signal at the output terminal 4 becomes larger when the ratio of the luminance signal level and the synchronization signal level of the input composite video signal is equal to or smaller than the specified value. I end up.

As mentioned above, in conventional AGC circuits, when considering variations in the modulator, etc., the AGC output varies depending on whether the ratio of the luminance signal level and the synchronization signal level is larger or smaller than the specified value, and the frequency deviation of the modulator The problem is that the amount cannot be kept within a certain value.

An object of the present invention is to eliminate the above-mentioned drawbacks of the prior art, and even when the ratio of the luminance signal level to the synchronization signal level of the input composite video signal is larger than a specified value,
such that the maximum composite video signal level is a constant value.
An object of the present invention is to provide an automatic gain control circuit.

Therefore, the present invention provides a ratio between the prescribed luminance signal level and the normal signal level, that is, 7/3, during the back porch period of the composite video signal obtained by the automatic gain control circuit.
The purpose is achieved by adding a double synchronization signal to the synchronization signal of the composite video signal and the opposite polarity, performing peak value detection on this added signal, and controlling the gain control circuit with the output signal.

FIG. 4 shows a block diagram of the present invention. 1st
Blocks with the same reference numerals as those in the figures refer to blocks having similar functions. The operating principle of the AGC circuit shown in FIG. 4 will be explained.

The composite video signal shown in Figure 5A is input to input terminal 1.
The leading edge of the synchronizing signal is clamped to the comparative DC potential inputted from the input terminal 12, and the clamped composite video signal is sent to the output terminal 4, the adder circuit 5, and the differential amplifier. 11. In the differential amplifier 11, the potential difference between the comparison DC potential inputted from the input terminal 12 and the video signal is taken out, and the potential difference is taken out from the gate circuit 1.
It is input to 0. On the other hand, the horizontal synchronization signal is input to terminal 7.
The delay pulse shown in FIG. 5B is obtained by the delay circuit 8, and the gate circuit 10 is gated for approximately the back porch period using this delay pulse, thereby corresponding to the amplitude of the synchronizing signal shown in FIG. 5C. A pulse is obtained during the back porch period. This pulse is added to the aforementioned composite video signal in the adder circuit 5 to obtain an added signal as shown in FIG. 5D. In this case, the gain of the differential amplifier 11 is
The ratio of the brightness signal level and the synchronization signal level of the prescribed composite video signal is set, and in the adding circuit 5,
The addition pulse is added with the opposite polarity to the synchronization signal of the composite video signal. By doing this, the amplitude of the addition pulse is always equal to the white peak level of the luminance signal, and there is no need to take into account variations in the modulator, etc., and provide a margin for the addition pulse as in the conventional example. The drawbacks mentioned in the example will disappear. Note that the processing of this addition signal is the same as in the conventional example, so a description thereof will be omitted.

Next, specific examples of the present invention will be described. Since the gain control circuit 2, clamp circuit 3, peak value detection circuit 6, and delay circuit 8 shown in FIG. 4 are well known, a detailed explanation thereof will be omitted.

FIG. 6 shows a specific example of the gate circuit 10, the differential amplifier 11, and the adder circuit 5, and the operation thereof will be explained.

Transistors 14, 16, resistors 13, 15, constant current sources 17, 18 constitute the adder circuit 5 shown in FIG. 4, transistors 19, 21, 22, resistors 20,
23 constitutes the differential amplifier 11 and the gate circuit 10. The bias power supply 24 is the transistor 14,
A bias of the potential at the tip of the sync signal of the composite video signal after clamping is applied to the base of 21. Terminal 25 is a power supply terminal, and blocks with the same reference numerals as in FIG. 4 have the same functions as the blocks in FIG.

A composite video signal, as shown in FIG.
3, 15, transistors 14, 16, current source 1
A composite video signal having a phase opposite to the input signal as shown in FIG. On the other hand, a delay pulse as shown in FIG. 7C is input from the delay circuit 8 to the base of the transistor 22, and the transistor 22 can be made conductive for an appropriate period of the back porch. The base of the transistor 21 is supplied with a DC voltage from a bias power supply 24 which is a constant voltage source, and the base of the transistor 19 is supplied with a video signal whose synchronizing signal tip is clamped to the potential of the bias power supply 24 which is a constant voltage source. is supplied, so that during the appropriate period of the back porch when transistor 22 is conducting, there is a voltage across resistor 20.
A difference voltage is generated between the back porch level potential of the video signal and the synchronization signal tip potential, that is, a potential difference corresponding to the amplitude of the synchronization signal. Therefore, a current obtained by dividing the voltage of the magnitude of the synchronization signal by the resistance value of the resistor 20, that is, a current proportional to the magnitude corresponding to the amplitude of the synchronization signal, flows through the resistor 13 via the transistor 19. The collector voltage of the transistor 19, that is, the collector voltage of the transistor 16, further decreases by a voltage drop corresponding to the product of the current value and the resistance value of the resistor 13, and the collector of the transistor 16 has the signal waveform shown in FIG. 7B. The voltage drop due to the collector current of the transistor 19 is added, and an added signal as shown in FIG. 7D is finally obtained at the collector of the transistor 16. In this case, if the ratio of the emitter resistor 15 and the emitter resistor 20 is set to be equal to the ratio of the luminance signal level and the synchronization signal level of the prescribed composite video signal, the added synchronization signal in the addition signal shown in FIG. The level matches the white peak level of the luminance signal, and a desired signal is obtained. The subsequent operation is similar to the conventional example.

In the present invention, a delay circuit is provided for generating gate pulses, but it is also possible to utilize burst gate pulses from a color circuit.

As described above, according to the present invention, there is no need to consider variations in modulators, etc. as a margin of addition pulses, and the drawbacks of conventional circuits can be significantly improved.

〓〓〓〓〓
In other words, conventionally in magnetic recording and reproducing devices, etc., the amount of frequency deviation of the modulator is kept constant for signals with different ratios of luminance signal level and synchronization signal level due to variations in the voltage-to-frequency conversion sensitivity of the frequency modulator. However, according to the present invention, it is only necessary to consider the variation in the resistance ratio within the AGC circuit, and the above-mentioned problem is greatly improved.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a conventional example of an AGC circuit, Figs. 2 and 3 are signal waveform diagrams for explaining the conventional example, Fig. 4 is a block diagram showing an embodiment of the AGC circuit of the present invention, and Figs. FIG. 7 is a signal waveform diagram for explaining the present invention, and FIG. 6 is a circuit diagram of a specific example of the present invention. 2: gain control circuit, 3: clamp circuit, 5: addition circuit, 6: peak value detection circuit, 8: delay circuit,
10: Gate circuit, 11: Differential amplifier. 〓〓〓〓〓

Claims (1)

[Claims] 1. A gain control circuit to which a video signal is supplied, a clamp circuit connected to the output of the gain control circuit and fixing the tip of the synchronization signal of the video signal to a constant potential, and a video signal output from the clamp circuit. The potential difference between the synchronization signal tip and the porch level of the signal is detected, and the amplitude corresponding to this potential difference is multiplied by the ratio of the white peak amplitude and the synchronization signal amplitude in a standard composite video signal. The circuit includes a circuit that adds a pulse signal to the back porch period of the video signal output from the clamp circuit so that the polarity is opposite to that of the synchronization signal, and a circuit that peak-detects the video signal to which the pulse signal is added, An automatic gain control circuit characterized in that the gain control circuit is controlled by an output signal of the circuit. 2. The circuit for adding the pulse signal includes a differential amplifier circuit, one input of which is supplied with the potential at the tip of the synchronization signal, and the other input of which is supplied with the output video signal of the clamp circuit, and a differential amplifier circuit provided after the synchronization signal. 2. The automatic gain control circuit according to claim 1, further comprising a pulse signal generating means comprising a gate means for outputting a signal from the differential amplifier circuit only during a back porch period in which the differential amplifier circuit is set. .