JPH0325050B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to an automatic gain control circuit using a transistor circuit.

(Conventional example) First, a conventional example will be explained with reference to FIG.

In FIG. 1, 1 is a variable gain amplifier, 2, 3
is a comparator, 4 is a transistor, 5 to 7 are resistors,
8 is a reference voltage source, 10 is a detection circuit, 24 is a bias circuit, and 11 and 12 are input/output terminals, respectively. Also, a comparator 2, a comparator 3, a transistor 4, a resistor 5, a resistor 6, a resistor 7, and a reference voltage source 8.
constitutes the detection circuit 13.

A detection circuit that detects the output signal level of the variable gain amplifier 1 by a detection circuit 13, and includes a smoothing means and a control means for changing the gain of the variable gain amplifier 1 by the smoothing means according to the input signal level to the detection circuit 13. The circuit 10 provides a variable gain amplifier 1
respectively giving first and second gain control signals to
The variable gain amplifier 1 is made to perform automatic gain control in different states. Here, the detection of the input signal level is performed by using resistors 5 to 7 connected in series between the emitter of the transistor 4 and the reference potential point to divide the signal level into a predetermined reference voltage as a comparison voltage. This is done by comparing the given comparators 1 and 2. That is, the signal component applied to the base of the transistor 4 is V _I and the bias voltage applied by the bias circuit 24 to the base of the transistor 4 is
The resistance value of each of V _B resistors 5 to 7 is
When _R5 and the base-to-emitter forward voltage of transistor 4 are _VF , equations (1) to (4) hold true.

_{V 2A = VI _ _ _ _ _ _ _ _ _ _ _ F} ) × R ₆ + R ₇ / R ₅ + R ₆ + R ₇ ... (3) V _3D = (V _B - V _F ) × R ₇ / R ₅ + R ₆ + R ₇ ... (4) However, V _2A : Comparator Signal component at the input terminal of comparator 2 V _3A : Signal component at the input terminal of comparator 3 V _2D : DC bias voltage applied to the input terminal of comparator 2 V _3D : DC bias applied to the input terminal of comparator 3 Voltage Also, if the comparison voltage given to the comparators 2 and 3 by the reference voltage source 8 is V _R , then this comparison voltage V _R
and V _2A +V _2D , V _3A + given by equations (1) to (4)
The input terminal voltages V _3D are compared by comparators 2 and 3, respectively. Here, the comparison voltage V _R of comparators 2 and 3
is given by V _R = (V _B − V _F ) + V _X ……(5). At this time, according to equations (1) to (5), the outputs of comparators 2 and 3 are inverted from a certain state at the time when equations (6) and (7) are satisfied, respectively.

{V _B −V _F )+V′ _I }×R ₆ +R ₇ /R ₅ +R ₆ +R ₇ = (V _B −V _F )+V _X …(6) {V _B −V _F +V″ _I }×R ₇ /R ₅ +R ₆ +R ₇ = (V _{B −} V _{F )} + _V Solving, V' _I = R ₅ / R ₆ + R ₇ × (V _B − V _F ) + (1 + R ₅ / R ₆ + R ₇ ) × V _X = R ₅ / R ₆ + R ₇ × {(V _B − V _{F ) ＋ V _ _ _ _ _ _ _ _ _ _ _} (V _B −V _F )+ _{V X} } _{+ V} is expressed as Equation (10) from Equations (8) and (9).

V″ _I /V′ _I = R ₅ + R ₆ / R ₇ × (V _B − V _F )
+(1+ _R5 + _R6 / _R7 )× _VX / _R5 + _R6 / _R7 ×( _VB − _VF )+
(1+ _R5 + _R6 / _R7 )× _VX ...(10) In the conventional circuit example shown in FIG. The adjustment is made by adjusting the comparison voltage V _B , (10)
As is clear from the formula, when the comparison voltage V _R is changed to adjust the detection level, accordingly,
There is a drawback that the relative relationship between the detection levels of each of the comparators 2 and 3 is shifted. Furthermore, the only reason that the relative relationship between the detection levels of comparators 2 and 3 does not depend on the comparison voltage _VR is that in equation (5), _VR = (V _B - V _F )... ( _{11 )} That _{is , when V} (V _B −V _F )/
R ₅ + R ₆ / R ₇ × (V _B − V _F ) = (R ₅ + R ₆ ) × (R ₆ + R ₇ ) / R ₅
×R ₇ (12), which is given by the ratio of resistors 5 to 7, but in this case, the comparison voltage must be uniquely determined to the value of equation (11).

As described above, in the conventional circuit example in which a signal has multiple detection levels using multiple comparators and the comparison voltage of the comparator is adjusted to adjust the detection level, when the comparison voltage of the comparator is changed, However, there was a drawback that the relative relationship between the detection levels of each comparator was shifted.

(Object of the Invention) An object of the present invention is to eliminate such drawbacks, to provide a plurality of gain control signals to a variable gain amplifier, and to provide a variable gain amplifier with a constant control signal even when the relative relationships and comparison voltages of the plurality of control signals are changed. An object of the present invention is to provide an automatic gain control circuit characterized by constant operation.

(Structure of the Invention) According to the present invention, there is provided a variable gain amplifier that receives a plurality of control signals and performs amplification operation with a gain corresponding to each control signal, and a constant current source that receives the output of the amplifier as a base and has a constant current source at the emitter. the supplied first transistor; a second transistor whose base receives a bias voltage equal to the base bias voltage of the first transistor; and whose emitter is provided with a constant current source; the first transistor and the second transistor; at least three resistors connected in series between the emitters of the resistors, a plurality of comparators that compare the voltage at each connection point of the resistors with a single reference voltage, and outputs of the plurality of comparators, respectively, and a circuit for converting the control signal into a control signal.

(Embodiments of the Invention) Next, the present invention will be described in more detail with reference to the drawings.

FIG. 2 shows an embodiment of the present invention, in which 1 is a variable gain amplifier, 2 and 3 are comparators, 8 is a reference voltage source, 10 is a detection circuit, 14 and 15 are transistors, and 16 to 18 is a low resistance, 19 and 22 are bias circuits, 20 and 21 are constant source currents, 11 and 12
indicate input and output terminals, respectively. Also, comparator 2,
Comparator 3, transistor 14, transistor 1
5, resistor 16, resistor 17, resistor 18, constant current source 20, constant current source 21, bias circuit 19, and reference voltage source 8 constitute a detection circuit 23.

The circuit of the embodiment shown in FIG. 2 detects the output level of the variable gain amplifier 1 by a detection circuit 23,
A detection circuit 10 comprising a smoothing means and a control means for changing the gain of the variable gain amplifier 1 by the output thereof according to the input signal level to the detection circuit 23.
As a result, first and second gain control signals are provided to the variable gain amplifier 1, respectively. In the detection circuit 23, the output of the variable gain amplifier 1 applied via the bias circuit 22 is received at the base of a transistor 14 which has a constant current source 20 on its emitter, and further receives the output of the variable gain amplifier 1 applied via a bias circuit 22 to the base of a transistor 14 which has a constant current source 21 on its emitter.
A bias voltage is applied to the base from a bias circuit 19. Resistors 16, 17, and 18 are connected in series between the emitters of transistors 14 and 15, the connection point between resistors 16 and 17 is connected to comparator 2, and the connection point between resistors 17 and 18 is connected to comparator 3.
It is connected to the. According to this configuration, even if the reference voltage source 8 changes the detection level with respect to the signal level input to the detection circuit 23 using the comparison voltages of the comparators 2 and 3, the detection level of each of the comparators 2 and 3 remains unchanged. The relative relationship can always be constant.

That is, the signal component applied to the base of the transistor 14 is V _I , the bias voltage applied to the base of the transistor 14 by the bias circuit 22 is V _B , and the resistance value of each of the resistors 16 to 18 is R 16 to R ₁₆ , respectively. R ₁₈ , and the bias voltage applied by the bias circuit 19 to the base of the transistor 15 is V′ B , and the bias voltage applied to the base of the transistor 15 is V′ _B ,
If the forward voltage between the base and emitter of is V _F , then
Equations (13) to (16) hold V′ _2A ×R ₁₇ +R ₁₈ /R ₁₆ +R 17 +R ₁₈ …(13) V′ _3A =V _I ×R ₁₈ /R ₁₆ +R ₁₇ + _{R 18 …} ( 14) V′ _2D = (V _B −V _F )−{(V _B −V _F )−(V′ _B −V _F )}
×R ₁₆ /R ₁₆ +R ₁₇ +R ₁₈ = (V _B −V _F )−(V′ _B −V _F )×R ₁₆ /R ₁₆ +R ₁₇
+R ₁₈ ……(15) V′ _3D = (V _B −V _F )−{(V′ _B −V _F )}×R ₁₆ +R ₁₇ /R
₁₆ +R ₁₇ +R ₁₈ = (V _B − V _F ) − (V′ _B − V _F ) × R ₁₆ + R ₁₇ /
R ₁₆ +R ₁₇ +R ₁₈ ...(16) However, V' _2A : Signal component at the input terminal of comparator 2 V' _3A : Signal component at the input terminal of comparator 3 V' _2D : At the input terminal of comparator 2 Applied DC bias voltage V′ _3D : DC bias voltage applied to the input terminal of comparator 3 Here, bias voltage V _B applied to the base of transistor 14 by bias circuit 22 and bias voltage applied to the base of transistor 15 by bias circuit 19 If _the bias voltage V′ _{B given to} ) V′ _3D = V _B −V _F ……(18) Also, if the comparison voltage given to the comparators 2 and 3 by the reference voltage source 8 is V _R , then this comparison voltage V _R
The comparator input terminal voltages V′ _2A +V′ _2D , V′ _3A +V′ _3D given by equations (13), (14), (17), and (18) are respectively , 3. here,
Assuming that the comparison voltage V _{R of} the comparator 23 is given by V _R = (V _B − V _F ) + _V 17)
From equations (20) to (19), the outputs of comparators 2 and 3 are reversed from a certain state when equations (20) and (21) hold, respectively.

(V _B −V _F ) +V′ _I +R ₁₇ +R ₁₈ /R ₁₆ +R ₁₇ +
_{R 18 = ( V B} − _{V F ) + V}
(V _B −V _F )+V _X ……(21) Here, V′ _I in equation (20) is the comparison voltage V _R
shows the signal component at the base of the transistor 14 when the state of the output of the comparator 2 is inverted when is given by the equation (19), and V″ _I in the equation (21)
It shows the signal component at the base of the transistor 14 when the state of the output of the comparator 3 is inverted when the comparison voltage V _R is given by equation (19). (20)
When equations (21) and (21) are solved for the signal components V′〓 and V″〓, equations (22) and (23) are obtained.

V′=R ₁₆ +R ₁₇ +R ₁₈ /R ₁₇ +R ₁₈ ……(22) V″=R ₁₆ ++R ₁₇ +R ₁₈ /R _{18 ×} V The ratio of the signal levels detected by each, that is, the ratio of V′〓 and V″〓 is as shown in equations (22) and (23).

V″〓／V′〓=R ₁₆ +R ₁₇ +R ₁₈ /R ₁₈ ×V _X R ₁₆
+R ₁₇ +R ₁₈ /R ₁₇ +R ₁₈ ×V _X =R ₁₇ +R ₁₈ /R ₁₈ =1 + R ₁₇ /
R ₁₈ ...(24) As shown by equation (24), according to the embodiment of the present invention shown in FIG. 2, by changing the comparison voltage V _R applied to the comparators 2 and 3, Even if the detection level of the input signal applied to the input of the detection circuit 23, that is, the base of the transistor 14 is adjusted, the relative relationship between the detection levels of each of the comparators 2 and 3 is determined by the resistor 17 and the resistor 18. , is always kept constant.

Here, in one embodiment of the present invention shown in FIG. 2, three resistors 16 to 18, a comparator 2,
3, and two different gain control signals, first and second, are applied to the variable gain amplifier 1. However, the effect of the present invention is not limited to the one shown in FIG. Without being limited to the embodiment, for example, in FIG. 2, a first
A first resistor, in which n resistors of n to n-th are connected, and a common comparison voltage is applied to the connection point between each resistor.
By connecting the input terminals of the (n-1)th to (n-1) comparators, respectively, the first to (n-1)th (n-1) comparators are connected to the variable gain amplifier 1.
Similar effects can be obtained even when an automatic gain control circuit that provides different gain control signals is implemented. Further, the detection circuit 10 may be provided with only a simple control means, and the bias circuit 22 may be provided with a detection function.

FIG. 3 shows the present invention in a video magnetic recording apparatus [hereinafter referred to as
This is an embodiment implemented in an automatic gain control circuit in a luminance signal processing circuit of a VTR (Video Tape Recorder). In FIG. 3, resistors 35 to 38 are connected in series between the emitters of transistors 30 and 31 that constitute a detection circuit 47.
, connect the resistor 36, 36 connection point, resistor 36,
The input terminals of comparators 27, 28 and 29 are connected to the connection point of 37 and the connection point of resistors 37 and 38, respectively, and the output of the comparator 27 is connected to a switch controlled by the output pulse of the burst gate pulse circuit 46. A smoothing circuit 42 is connected via the circuit 41,
The output of the comparator 29 is connected to a smoothing circuit 40 via a switch circuit 40 that is controlled by a pulse whose phase is 180° different from the pulse that controls the switch circuit 41 output from the burst gate pulse generation circuit 46.
It is connected to the smoothing circuit 42 via. Further, the output of the comparator 28 is connected to a smoothing circuit 43, and the outputs of each of the smoothing circuit 43 and the smoothing circuit 42 are input to a control circuit 44 that controls the gain of the variable gain amplifier 24. Additionally, a clamp circuit 4 is connected between the output of the variable gain amplifier 24 and the base of the transistor 30.
5 is connected. Further, 34 is a bias circuit.

In FIG. 3, a luminance signal input from a terminal 25 is passed through a variable gain amplifier 24 to a detection circuit 4.
7, that is, the base of the transistor 30, the tip of the synchronizing signal in the luminance signal is always clamped to a predetermined potential by the clamp circuit 45. The clamp voltage set by the clamp circuit 45 is _VB , and the transistor 31
If the output voltage of the bias circuit 34 is set equal to this at the base of the transistor 30, the potential at the emitter point of the transistor 30 and the input terminal point of each of the comparators 27, 28, and 29 when a luminance signal V _I is applied to the transistor 30 The potentials V _E30 , V ₂₇ , V ₂₈ , and V ₂₉ are expressed as V _E30 = (V _B − V _F ) + V _I ……(25) V ₂₇ = (V _B − V _F ) +V _I ×R ₃₆ +R ₃₇ +R ₃₈ /R ₃₅ +R ₃₆ +R ₃₇
+R ₃₈ ……(26) V ₂₈ = (V _B −V _F )×R ₃₇ +R ₃₈ /R ₃₅ +R ₃₆ +R ₃₇ +R ₃₈ ……(
27) V ₂₉ = (V _B − V _F ) + V _I × R ₃₈ / R ₃₅ + R ₃₆ + R ₃₇ + R ₃₈ ... (28) However, R ₃₅ , R ₃₆ , R ₃₇ , R ₃₈ : Resistance 35 to resistance
Resistance value of 38 V _F : Forward voltage between the base and emitter of transistors 30 and 31. Also, V _I assumes that the tip of the synchronizing signal is 0. Here, the comparison voltage V _R applied to the comparators 27 to 29 is When _{V R} = _{V B − V F + V} V _DET29 /V _DET27
Similarly to equations (20) to (24), they become equations (30) to (34), respectively.

V _DET27 =R ₃₅ +R ₃₆ +R ₃₇ +R ₃₈ /R ₃₆ +R ₃₇ +R ₃₈ ×V _X ……(
30) V _DET28 =R ₃₅ +R ₃₆ +R ₃₇ +R ₃₈ /R ₃₇ +R ₃₈ ×V _X ……(31) V _DET29 =R ₃₅ +R ₃₆ +R ₃₇ +R ₃₈ /R _{38 × V} /V _DET27 =R ₃₆ +R ₃₇ +R ₃₈ /R ₃₇ +R ₃₈ ...(33) V _DET29 /V _DET27 =R ₃₆ +R ₃₇ +R ₃₈ /R ₃₈ ...(34) According to equations (33) and (34) , comparators 27 to 27 which provide three different gain control signals to the variable gain amplifier 24.
The relative ratio of each of the 29 detection levels is always kept constant by the resistance ratio. Generally, in the automatic gain control circuit in the brightness signal processing circuit of a VTR, the first control is to keep the synchronization signal level in the brightness signal constant, and the video signal level is There are multiple controls, including a second control to prevent the gain from increasing, and a third control to prevent the automatic gain control circuit from locking incorrectly when an excessive input is applied transiently. It is necessary to provide an operating point. In FIG. 3, comparators 27 to 29 perform detection for performing the first to third controls, respectively. For example, in comparator 28, the white level of the video signal is set to 100%. When the white level of the video signal is 100%, the comparator 29 is set to detect it at each level of about 110%, and about 150% when the white level of the video signal is 100%.

FIG. 4 shows waveforms illustrating an example of the operation of the clamp circuit, three detection levels, and automatic gain control according to the embodiment of the present invention shown in FIG.
FIG. 4a shows the base point waveform of the transistor 30, where the tip of the synchronizing signal is clamped to the voltage _VB by the clamp circuit 45.
Therefore, the relationship between the detection level and clamp voltage for the input luminance signals of the comparators 27 to 29 is approximately as shown in FIG. 4b. FIGS. 4c and 4d show an example of automatic gain control, in which a luminance signal whose synchronizing signal has become lower than a predetermined level for some reason is input to the input of the detection circuit 47.
(c) shows a signal waveform at the emitter point of the transistor 30. The comparator 27 detects that the synchronization signal level is low, and adjusts the synchronization signal level to a predetermined level. At this time, the video signal part also
Although it is similarly amplified, it is detected by the comparator 28 and controlled to a constant level.
(Fig. 4d) If there is no comparator 28,
As shown by the broken line in (d), the video signal is amplified in the same way as the synchronization signal and exceeds a predetermined level, causing a problem.

As described above, according to the present invention, a complementary gain control signal is provided to a variable gain amplifier, and
An automatic gain control circuit can be realized by setting the detection level of the entire system while always keeping the relative relationship of the detection level to each signal level that provides the operating point constant.
It is suitable for automatic gain control in brightness signal processing circuits of VTRs, etc. Furthermore, it is clear that the present invention will be more effective if it is implemented using a semiconductor integrated circuit that allows easy matching of transistors and the relative ratio of resistances.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a conventional example, and FIG. 2 is a circuit diagram showing an embodiment of the present invention. 3 is a circuit diagram showing another embodiment of the invention, and FIG. 4 is a waveform diagram showing the operation of the other embodiment of the invention according to FIG. 1, 24...variable gain amplifier, 3, 3, 27-2
9... Comparator, 4, 14, 15, 30, 31... Transistor, 5-7, 16-18, 35-38... Resistor, 8, 39... Reference voltage source, 9... Reference potential point, 1
0, 48...detection circuit, 11, 12, 25, 26...
Terminal, 13, 23, 47...Detection circuit, 19, 2
2, 24, 34...bias circuit, 20, 21, 3
2, 33... Constant current source, 40, 41... Switch circuit, 42, 43... Smoothing circuit, 44... Control circuit, 4
5... Clamp circuit, 46... Burst gate pulse generation circuit.

Claims (1)

[Claims] 1 A variable gain amplifier that selectively receives a plurality of control signals and performs an amplification operation with a gain corresponding to each control signal, and a variable gain amplifier whose base receives the output of the amplifier together with a bias voltage and whose emitter is supplied with a constant current source. a second transistor whose base receives a bias voltage equal to the bias voltage applied to the base of the first transistor and whose emitter is provided with a constant current source;
at least three low resistors connected in series between the emitters of the transistors, a plurality of comparators that compare the voltage at each connection point of these resistors with the same reference voltage, and the outputs of the plurality of comparators. and a circuit for converting each of the plurality of control signals into the plurality of control signals.