JPH0417510B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic gain control device for video signals used, for example, in magnetic recording and reproducing devices, television devices, and the like.

Generally, an automatic gain control device for a video signal inserts a pulse of a certain level value into the blanking portion of the video signal extracted from the composite video signal, and detects the sum of the magnitude of this pulse and the magnitude of the horizontal synchronization signal. By doing this, the gain of the composite video signal is controlled. The peak value detection circuit for detecting the sum of the magnitude of the pulse and the magnitude of the horizontal synchronization signal has a sufficiently large discharge time constant to suppress flickering of brightness on the television screen. In some cases, the gain of the composite video signal is abnormally suppressed due to large-level noise pulses mixed into the video signal when switching television channels, etc., and it takes a long time to return to normal. I had a problem with getting used to it. The conventional device will be explained in detail below with reference to FIGS. 1 and 2.

FIG. 1 shows a block diagram of an example of a conventional automatic gain control device.

A composite video signal as shown in FIG. 2A is applied to an input terminal 1, a gain control circuit 2 and a clamp circuit 3.
The signal is taken out to the output terminal 4 through the adder circuit 5 and the synchronizing signal separation circuit 6.

The output of the synchronization separation circuit 6 is sent to the delay pulse generation circuit 7.
is added to the adder circuit 5 to generate a delayed pulse of a predetermined level value as shown in FIG. 2B. In the adder circuit 5, the delayed pulse is added to the blanking portion of the video signal to generate an added signal as shown in FIG. 2C. This added signal is supplied to the peak value detection circuit 8, where the peak value is detected as shown by the dashed line b in FIG. The gain is controlled so that the sum of the signal and the delayed pulse of a predetermined level value is constant.

At this time, if the discharge time constant of the peak value detection circuit 8 is not so large compared to one frame of the television screen, the gain of the gain control circuit 2 varies between the upper and lower parts of the television screen, which causes flickering. becomes. Therefore, the discharge time constant needs to be set sufficiently large.

On the other hand, if the composite video signal contains relatively large-level noise pulses as shown in a of FIG. 2A, the output of the peak value detection circuit 8 will be a noise pulse as shown in b of FIG. 2C. The discharge time constant is set to be large as mentioned above, so it is difficult to return to the normal level. In other words, the gain of the gain control circuit 2 is abnormally suppressed for a long period of time, and the level of the composite video signal at the output terminal 4 is clearly lower than the normal level Vo, as shown in FIG. 2D. The disadvantage is that the condition occurs over a long period of time.

An object of the present invention is to eliminate the above-mentioned drawbacks of the prior art, and to quickly output a composite video signal at a normal level even when a high-level noise pulse is mixed into the composite video signal when switching between television channels. An object of the present invention is to provide an automatic gain control device having excellent responsiveness.

An embodiment of the present invention will be described below with reference to FIGS. 3 to 5.

FIG. 3 is a block diagram of an automatic gain control device which is an embodiment of the present invention.

In the figure, 1 is an input terminal connected to the gain control circuit 2, 3 is a clamp circuit provided between the gain control circuit 2 and the output terminal 4, 5 is an adder circuit connected to the output terminal of the clamp circuit 3, 6 is a synchronization signal separation circuit, 7 is a delay pulse generation circuit provided between the synchronization signal separation circuit 6 and the addition circuit 5, 8 is a peak value detection circuit connected to the gain control circuit 2, and 9 is a level detection circuit. The circuit 10 is a discharge circuit 10 provided between the level detection circuit 9 and the peak value detection circuit 8.
It is.

Next, the operation of this device will be explained.

A composite video signal as shown in FIG. 4A is applied to an input terminal 1, passed through a gain control circuit 2, and applied to a clamp circuit 3. In the clamp circuit 3, the horizontal synchronizing signal portion of the video signal is clamped and taken out to an output terminal 4, and is also applied to an adder circuit 5 and a synchronizing signal separation circuit 6.

The output of the synchronizing signal separation circuit 6 is applied to a delay pulse generation circuit 7, which generates a delay pulse of a predetermined level value as shown in FIG. 4B, and is applied to the addition circuit 5. In the adder circuit 5, the delay pulse is added to the blanking portion of the video signal, and the delay pulse is added to the blanking portion of the video signal as shown in FIG.
Generates an addition signal as shown in . This addition signal is supplied to the peak value detection circuit 8 and also to the level detection circuit 9. The level detection circuit 9 is
Comparing the reference potential shifted by a certain level from the clamp potential set by the clamp circuit with the addition signal, the addition signal is smaller for a period of time, that is, the level of the addition signal is lower than the clamp potential and the reference potential. The addition signal is supplied to the discharge circuit 10 only during the period between. The reference potential is set between the leading edge of the synchronizing signal and the pedestal level. For example, if the reference potential is set as shown by the broken line c in FIG. 4C, then the broken line d shown in the same figure
Since is the above-mentioned clamp potential, the output of the level detection circuit 9 becomes as shown in FIG. 4D. The discharge circuit 10 changes the discharge current of the time constant circuit of the peak value detection circuit 8 according to the output of the level detection circuit 9. That is, only when the level of the addition signal is lower than the reference potential, the discharge circuit 10 discharges a current corresponding to the difference between the addition signal and the reference potential. The output of the peak value detection circuit 8 is supplied to the gain control circuit 2 as its control signal. Therefore, when the composite video signal contains a noise pulse of a relatively large level as shown in a of FIG. Even if the level of the video signal becomes small, the output of the peak value detection circuit 8 is intermittently discharged as shown by the dashed line b in FIG. 4C and quickly returns to the normal level. The composite video signal level returns to the normal level as shown in FIG. 4E.

Next, a specific example of this embodiment will be explained using FIG. 5. The gain control circuit 2, clamp circuit 3, addition circuit 5, synchronization signal separation circuit 6, delay pulse generation circuit 7, and peak value detection circuit 8 shown in FIG. 3 are well known, so a specific example will not be explained. Omitted.

As shown in FIG. 5, transistors 11, 13,
resistor 12, constant voltage source 14, and constant current source 15,
16 constitutes the level detection circuit 9 shown in FIG. 3, and the transistor 11 constitutes the discharge circuit 1 shown in FIG.
Also serves as 0. Terminal 17 is a power supply terminal, and blocks with the same reference numerals as those shown in FIG. 3 have the same functions as those shown in FIG. For ease of understanding, the peak value detection circuit 8 includes an amplifier 18, a charging transistor 19, and a resistor 2 constituting a time constant circuit.
0 and a capacitor 21.

An addition signal as shown in FIG. 4C, in which the tip of the synchronizing signal is clamped and the delay pulse is added from the adder circuit 5, is supplied to the amplifier 18 of the peak value detection circuit 8 and input to the base of the transistor 13. be done. Since the base of the transistor 11 is supplied with a reference potential shifted by a certain level from the clamp potential by the constant voltage source 14, the collector of the transistor 11 is supplied with a reference potential shifted by a certain level from the clamp potential.
A current of opposite polarity to the current shown in FIG. 4D attempts to flow. Therefore, when the potential of the capacitor 21, that is, the emitter potential of the transistor 19 is abnormally raised due to noise pulses included in the composite video signal, and the transistor 19 is cut off, the collector current of the transistor 11 is
It functions as a discharging current of 1, which effectively reduces the time constant of the time constant circuit and quickly lowers the potential of the capacitor 21. This allows the output level of the automatic gain control device to be quickly adjusted as shown in Figure 4E. can be brought back to normal level.

In this embodiment, the discharge circuit 10 shown in FIG.
The configuration is such that the discharge current of the discharge circuit 10 is varied according to the output of the level detection circuit 9, but a gate circuit is further provided between the discharge circuit 10 and the peak value detection circuit 8 to keep the discharge current of the discharge circuit 10 constant. The output of detection circuit 9 turns on and off the above gate circuit.
A similar effect can be obtained by switching to .
Further, in this embodiment, the input of the synchronizing signal separation circuit 6 is supplied from the output terminal 4, but the same effect can be obtained even if it is supplied from the input terminal 1. Further, in the above example, the input of the level detection circuit 9 is supplied from the output of the adder circuit 5, but the same effect can be obtained even if it is supplied from the output terminal 4.

As described above, according to the present invention, it is possible to realize an automatic gain control device with excellent responsiveness that can quickly restore the output level to the normal level even when a high-level noise pulse is mixed into the composite video signal. Moreover, it does not require any additional capacitance or coil, and is extremely suitable for integrated circuit implementation.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a conventional automatic gain control device, Fig. 2 is a waveform diagram of input and output signals of each part of the same device,
FIG. 3 is a block diagram of an automatic gain control device that is an embodiment of the present invention, FIG. 4 is a waveform diagram of input and output signals of each part of the device, and FIG. 5 is a diagram showing a specific example of the automatic gain control device. FIG. 1...Input terminal, 2...Gain control circuit, 3...
Clamp circuit, 4...Output terminal, 5...Addition circuit, 6...Synchronizing signal separation circuit, 7...Delayed pulse generation circuit, 8...Peak value detection circuit, 9...Level detection circuit, 10...Discharge circuit.

Claims (1)

[Claims] 1. A gain control circuit that controls the gain of the composite video signal, a clamp circuit that is connected to the gain control circuit and fixes the leading end of the synchronization signal of the composite video signal to a constant potential, and the magnitude of the output level of the clamp circuit. and a peak value detection circuit that detects and controls the gain of the gain control circuit, and compares the output signal of the clamp circuit with a reference potential shifted by a predetermined potential from the constant potential to determine the output signal of the clamp circuit. A level detection circuit that outputs a signal according to the potential difference for a smaller period of time is connected to a time constant circuit of the peak value detection circuit, and the discharge current value of the time constant circuit is changed in accordance with the output of the level detection circuit. the gain control circuit is controlled by the output of the peak value detection circuit, and when the peak value detection circuit is abnormally charged due to large level noise etc., the gain of the gain control circuit is When the output of the level detection circuit decreases, the period during which the output of the level detection circuit is smaller than a predetermined value increases, and the operation period of the discharge circuit becomes longer than normal, thereby speeding up the discharge of the peak value detection circuit and controlling the gain control circuit. An automatic gain control device characterized in that it is configured to recover the gain of.