JPS6289153U - - Google Patents

Info

Publication number
JPS6289153U
JPS6289153U JP18051385U JP18051385U JPS6289153U JP S6289153 U JPS6289153 U JP S6289153U JP 18051385 U JP18051385 U JP 18051385U JP 18051385 U JP18051385 U JP 18051385U JP S6289153 U JPS6289153 U JP S6289153U
Authority
JP
Japan
Prior art keywords
lead frame
pitches
semiconductor elements
element mounting
types
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18051385U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP18051385U priority Critical patent/JPS6289153U/ja
Publication of JPS6289153U publication Critical patent/JPS6289153U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の素子を搭載したリ
ードフレームの平面図、第2図は従来のリードフ
レームの平面図である。 1……主ランナ、1b……分岐ランナ、3……
素子搭載部、4……パワ半導体素子、5……リー
ドフレーム。
FIG. 1 is a plan view of a lead frame on which an element according to an embodiment of the present invention is mounted, and FIG. 2 is a plan view of a conventional lead frame. 1... Main runner, 1b... Branch runner, 3...
Element mounting section, 4... power semiconductor element, 5... lead frame.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数の半導体素子を搭載するリードフレームに
おいて、該半導体素子を搭載する素子搭載部間の
ピツチを少なくとも2種以上有し、これらのピツ
チが交互となるように配置したことを特徴とする
リードフレーム。
A lead frame on which a plurality of semiconductor elements are mounted, characterized in that the lead frame has at least two types of pitches between the element mounting portions on which the semiconductor elements are mounted, and these pitches are arranged alternately.
JP18051385U 1985-11-22 1985-11-22 Pending JPS6289153U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18051385U JPS6289153U (en) 1985-11-22 1985-11-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18051385U JPS6289153U (en) 1985-11-22 1985-11-22

Publications (1)

Publication Number Publication Date
JPS6289153U true JPS6289153U (en) 1987-06-08

Family

ID=31124541

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18051385U Pending JPS6289153U (en) 1985-11-22 1985-11-22

Country Status (1)

Country Link
JP (1) JPS6289153U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6017939A (en) * 1983-07-11 1985-01-29 Nec Corp Lead frame for semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6017939A (en) * 1983-07-11 1985-01-29 Nec Corp Lead frame for semiconductor device

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