JPS62163939U - - Google Patents
Info
- Publication number
- JPS62163939U JPS62163939U JP1986052337U JP5233786U JPS62163939U JP S62163939 U JPS62163939 U JP S62163939U JP 1986052337 U JP1986052337 U JP 1986052337U JP 5233786 U JP5233786 U JP 5233786U JP S62163939 U JPS62163939 U JP S62163939U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- element fixing
- semiconductor
- circuit board
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 10
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Description
第１図は本考案に係る半導体装置の一実施例を
示す側断面図、第２図は電気的特性の損なわれた
半導体素子と半導体固着ピンの一体を回路基板か
ら除去した側断面図、第３図は再度半導体素子を
実装した側面図である。
１……回路基板、２……貫通穴、３……半導体
素子固着ピン、４……半導体素子。
FIG. 1 is a side cross-sectional view showing an embodiment of a semiconductor device according to the present invention, FIG. FIG. 3 is a side view of the semiconductor device mounted again. 1... Circuit board, 2... Through hole, 3... Semiconductor element fixing pin, 4... Semiconductor element.
Claims (1)
て、前記回路基板の半導体素子の固着部に貫通穴
を設け、その貫通穴に半導体素子固着ピンを植え
込み半導体素子固着ピンの頭部に半導体素子を固
着せしめボンデイング実装を施すことを特徴とす
る半導体装置。 In a circuit board on which a plurality of semiconductor elements are mounted, a through hole is provided in the semiconductor element fixing portion of the circuit board, a semiconductor element fixing pin is implanted in the through hole, and the semiconductor element is fixed to the head of the semiconductor element fixing pin. A semiconductor device characterized by performing bonding mounting.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986052337U JPS62163939U (en) | 1986-04-08 | 1986-04-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986052337U JPS62163939U (en) | 1986-04-08 | 1986-04-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62163939U true JPS62163939U (en) | 1987-10-17 |
Family
ID=30877417
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986052337U Pending JPS62163939U (en) | 1986-04-08 | 1986-04-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62163939U (en) |
-
1986
- 1986-04-08 JP JP1986052337U patent/JPS62163939U/ja active Pending