JPS6289052U - - Google Patents
Info
- Publication number
- JPS6289052U JPS6289052U JP17750585U JP17750585U JPS6289052U JP S6289052 U JPS6289052 U JP S6289052U JP 17750585 U JP17750585 U JP 17750585U JP 17750585 U JP17750585 U JP 17750585U JP S6289052 U JPS6289052 U JP S6289052U
- Authority
- JP
- Japan
- Prior art keywords
- image memory
- calculation circuit
- matrix
- data calculation
- write data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Storing Facsimile Image Data (AREA)
- Image Input (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17750585U JPS6289052U (enExample) | 1985-11-20 | 1985-11-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17750585U JPS6289052U (enExample) | 1985-11-20 | 1985-11-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6289052U true JPS6289052U (enExample) | 1987-06-06 |
Family
ID=31118766
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17750585U Pending JPS6289052U (enExample) | 1985-11-20 | 1985-11-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6289052U (enExample) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5745688B2 (enExample) * | 1975-02-10 | 1982-09-29 | ||
| JPS60153088A (ja) * | 1983-12-30 | 1985-08-12 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | メモリ・デ−タ・シフト装置 |
-
1985
- 1985-11-20 JP JP17750585U patent/JPS6289052U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5745688B2 (enExample) * | 1975-02-10 | 1982-09-29 | ||
| JPS60153088A (ja) * | 1983-12-30 | 1985-08-12 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | メモリ・デ−タ・シフト装置 |
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