JPS6288424U - - Google Patents

Info

Publication number
JPS6288424U
JPS6288424U JP17856785U JP17856785U JPS6288424U JP S6288424 U JPS6288424 U JP S6288424U JP 17856785 U JP17856785 U JP 17856785U JP 17856785 U JP17856785 U JP 17856785U JP S6288424 U JPS6288424 U JP S6288424U
Authority
JP
Japan
Prior art keywords
current limiting
inrush
switch
control
inrush current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17856785U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP17856785U priority Critical patent/JPS6288424U/ja
Publication of JPS6288424U publication Critical patent/JPS6288424U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Emergency Protection Circuit Devices (AREA)
  • Power Conversion In General (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の原理ブロツク図、第2図は本
考案による一実施例の回路図、第3図は本考案に
よる各部の波形の説明図、第4図は従来のグロツ
ク図、第5図はシーケンスの説明図を示す。 図において、1は整流平滑ユニツト、2は信号
変換回路、3は制御部、4は電流検出器、5は入
力側、7は負荷側、6はDC/DCコンバータを
示す。
Fig. 1 is a principle block diagram of the present invention, Fig. 2 is a circuit diagram of an embodiment of the invention, Fig. 3 is an explanatory diagram of waveforms of various parts according to the invention, Fig. 4 is a conventional circuit diagram, and Fig. 5 is a diagram of the conventional circuit. The figure shows an explanatory diagram of the sequence. In the figure, 1 is a rectifier and smoothing unit, 2 is a signal conversion circuit, 3 is a control section, 4 is a current detector, 5 is an input side, 7 is a load side, and 6 is a DC/DC converter.

Claims (1)

【実用新案登録請求の範囲】 入力側5からのAC電源が制御部3の制御によ
つてクローズ、オープンされる第1のスイツチr
l1と、電流の突入を制限する突入電流制限抵抗
Rと、該突入電流制限抵抗Rの短絡路を該制御部
3の制御によつて形成する第2のスイツチrl2
とを介して整流平滑ユニツト1に接続され、該整
流平滑ユニツト1によつて整流されたV1のDC
電源がDC/DCコンバータ6により、更にV2
のDC電源に変換されて負荷側7に出力されるよ
うに形成された突入電流制限回路において、 前記第2のスイツチrl1の誤動作を検出する
よう前記短絡路に流れる電流を検出する電流検出
器4と、 該電流検出器4からの検出信号S1をパルス信
号S2に変換して前記制御部3に送出する信号変
換回路2とが具備されたことを特徴とする突入電
流制限回路。
[Claims for Utility Model Registration] A first switch r to which AC power from the input side 5 is closed and opened under the control of the control unit 3.
l1, an inrush current limiting resistor R that limits the inrush of current, and a second switch rl2 that forms a short circuit between the inrush current limiting resistor R under the control of the control section 3.
The DC of V1 is connected to the rectifying and smoothing unit 1 via
The power supply is further increased to V2 by the DC/DC converter 6.
In the inrush current limiting circuit configured to be converted into a DC power source and output to the load side 7, a current detector 4 detects the current flowing through the short circuit to detect malfunction of the second switch RL1. An inrush current limiting circuit comprising: a signal conversion circuit 2 that converts a detection signal S1 from the current detector 4 into a pulse signal S2 and sends it to the control section 3.
JP17856785U 1985-11-20 1985-11-20 Pending JPS6288424U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17856785U JPS6288424U (en) 1985-11-20 1985-11-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17856785U JPS6288424U (en) 1985-11-20 1985-11-20

Publications (1)

Publication Number Publication Date
JPS6288424U true JPS6288424U (en) 1987-06-05

Family

ID=31120819

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17856785U Pending JPS6288424U (en) 1985-11-20 1985-11-20

Country Status (1)

Country Link
JP (1) JPS6288424U (en)

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