JPS6437389U - - Google Patents
Info
- Publication number
- JPS6437389U JPS6437389U JP1987130285U JP13028587U JPS6437389U JP S6437389 U JPS6437389 U JP S6437389U JP 1987130285 U JP1987130285 U JP 1987130285U JP 13028587 U JP13028587 U JP 13028587U JP S6437389 U JPS6437389 U JP S6437389U
- Authority
- JP
- Japan
- Prior art keywords
- smoothing
- circuit
- signal
- output
- alternating current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009499 grossing Methods 0.000 claims description 5
- 230000001629 suppression Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Rectifiers (AREA)
- Power Conversion In General (AREA)
Description
第１図は本考案を実施したラツシユ電流抑制回
路の概略図であり、第２図はその具体例を示す回
路図、そして第３図は動作説明図の波形図である
。第４図は従来例の回路図である。
１１……電源投入スイツチ、１２……整流回路
、１３……スイツチ手段、１４……平滑コンデン
サ、１３ａ……サイリスタ、１７……レベル判別
回路、１８……バツクアツプ回路、Ｖｉ……交流
電圧、Ｅ……所定レベル範囲。
FIG. 1 is a schematic diagram of a rush current suppression circuit embodying the present invention, FIG. 2 is a circuit diagram showing a specific example thereof, and FIG. 3 is a waveform diagram illustrating its operation. FIG. 4 is a circuit diagram of a conventional example. 11... Power supply switch, 12... Rectifier circuit, 13... Switch means, 14... Smoothing capacitor, 13a... Thyristor, 17... Level discrimination circuit, 18... Backup circuit, Vi... AC voltage, E ...predetermined level range.
Claims (1)
圧を平滑する平滑手段と、前記整流回路と平滑手
段との間に挿入されたスイツチ手段と、前記交流
電圧の所定レベル内で前記スイツチ手段のオン信
号を出力し前記所定レベルを越える範囲内では前
記オン信号を出力しないレベル判別手段と、前記
平滑手段の出力が所定値に達すると前記スイツチ
手段の導通のバツクアツプをするバツクアツプ回
路とから或るラツシユ電流抑制回路。 a rectifier circuit for rectifying alternating current voltage; a smoothing means for smoothing the rectified voltage; a switch means inserted between the rectifier circuit and the smoothing means; and a switch means for turning on the alternating current voltage within a predetermined level. A certain latch is provided by a level determining means which outputs a signal and does not output the on signal within a range exceeding the predetermined level, and a backup circuit which backs up the conduction of the switching means when the output of the smoothing means reaches a predetermined value. Current suppression circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987130285U JPS6437389U (en) | 1987-08-27 | 1987-08-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987130285U JPS6437389U (en) | 1987-08-27 | 1987-08-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6437389U true JPS6437389U (en) | 1989-03-07 |
Family
ID=31385314
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987130285U Pending JPS6437389U (en) | 1987-08-27 | 1987-08-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6437389U (en) |
-
1987
- 1987-08-27 JP JP1987130285U patent/JPS6437389U/ja active Pending