JPS63113486U - - Google Patents
Info
- Publication number
- JPS63113486U JPS63113486U JP575087U JP575087U JPS63113486U JP S63113486 U JPS63113486 U JP S63113486U JP 575087 U JP575087 U JP 575087U JP 575087 U JP575087 U JP 575087U JP S63113486 U JPS63113486 U JP S63113486U
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- rectifier
- power supply
- smoothing capacitor
- supply device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 4
- 239000003990 capacitor Substances 0.000 claims description 3
- 238000009499 grossing Methods 0.000 claims description 3
- 230000001629 suppression Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Rectifiers (AREA)
- Control Of Voltage And Current In General (AREA)
- Power Conversion In General (AREA)
Description
第1図は本考案の一実施例の回路図、第2図は
突入電流抑制の原理を説明する回路図、第3図は
第1の従来例の回路図、第4図は第2の従来例の
回路図、第5図は第3の従来例の回路図である。
D1……整流器、C1……平滑用コンデンサ、
DV……DC―DCコンバータ、RL……負荷、
R1……突入電流抑制用抵抗、Tγ1……スイツ
チング用トランジスタ、D2……電圧検出回路を
構成するツエナーダイオード、R4……電圧検出
回路を構成する抵抗。
Fig. 1 is a circuit diagram of an embodiment of the present invention, Fig. 2 is a circuit diagram explaining the principle of inrush current suppression, Fig. 3 is a circuit diagram of the first conventional example, and Fig. 4 is a circuit diagram of the second conventional example. FIG. 5 is a circuit diagram of a third conventional example. D1... Rectifier, C1... Smoothing capacitor,
DV...DC-DC converter, RL...Load,
R1... Resistor for inrush current suppression, Tγ1... Switching transistor, D2... Zener diode forming the voltage detection circuit, R4... Resistor forming the voltage detection circuit.
Claims (1)
電源装置で、上記整流器を構成する平滑用コンデ
ンサに並列に電圧検出回路を接続し、上記整流回
路に挿入された突入電流抑制用抵抗に並列に接続
したスイツチング手段を上記電圧検出回路の出力
信号により、上記平滑用コンデンサの充電電圧が
定常使用状態の電圧より若干低い電圧以下におい
て遮断させるようにした直流電源装置。 A DC power supply device that obtains DC by rectifying AC input with a rectifier circuit, in which a voltage detection circuit is connected in parallel to the smoothing capacitor that constitutes the rectifier, and in parallel to the inrush current suppression resistor inserted in the rectifier circuit. A direct current power supply device configured to cut off the connected switching means when the charging voltage of the smoothing capacitor is slightly lower than the voltage in a steady state of use, using the output signal of the voltage detection circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP575087U JPS63113486U (en) | 1987-01-19 | 1987-01-19 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP575087U JPS63113486U (en) | 1987-01-19 | 1987-01-19 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63113486U true JPS63113486U (en) | 1988-07-21 |
Family
ID=30787626
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP575087U Pending JPS63113486U (en) | 1987-01-19 | 1987-01-19 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63113486U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0297890U (en) * | 1989-01-19 | 1990-08-03 |
-
1987
- 1987-01-19 JP JP575087U patent/JPS63113486U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0297890U (en) * | 1989-01-19 | 1990-08-03 |
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