JPS6287490A - Growth of semiconductor crystal - Google Patents

Growth of semiconductor crystal

Info

Publication number
JPS6287490A
JPS6287490A JP22623585A JP22623585A JPS6287490A JP S6287490 A JPS6287490 A JP S6287490A JP 22623585 A JP22623585 A JP 22623585A JP 22623585 A JP22623585 A JP 22623585A JP S6287490 A JPS6287490 A JP S6287490A
Authority
JP
Japan
Prior art keywords
layer
substrate
gaas
buffer layer
xas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22623585A
Other languages
Japanese (ja)
Inventor
Masaaki Nidou
正明 仁道
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP22623585A priority Critical patent/JPS6287490A/en
Publication of JPS6287490A publication Critical patent/JPS6287490A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To form a GaAs layer of high quality having low dislocation, etc., by providing a specific buffer layer having composition gradually changing from the side of a substrate on an Si substrate in forming a GaAs layer or AlxGa1-xAs layer on the Si substrate. CONSTITUTION:A buffer layer 2 having a composition consisting of SiyGe1-y is formed on an Si substrate 1 by using a molecular beam epitaxial or vapor- phase growth method, etc., and the composition is formed so as to change from y=1 on the side of the substrate 1 gradually to y=0. A GaAs layer or AlxGa1-xAs layer 3 is then formed on the buffer layer 2. As a result, the lattice strain is absorbed in the buffer layer 2 and a strain is not taken over to the GaAs crystal 3 formed on the buffer layer 2. The aimed GaAs layer 3 having low dislocation can be formed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、st基板上にG a A s/AjxG 
a 1−XA8層を形成する結晶成長方法に関するもの
である。
[Detailed Description of the Invention] [Industrial Field of Application] This invention provides a method for forming G a A s/AjxG on a st substrate.
The present invention relates to a crystal growth method for forming an a1-XA8 layer.

〔従来の技術〕[Conventional technology]

最近5通常(7)ICとGaAs/AlGaAs系など
の光半導体素子とを集積化する技術が開発され始めてい
る。このため気相成長法、分子ビームエピタキシャル法
等によりSi基板上にG a A s結晶を形成する研
究が行なわれているが、Siの格子定数(約5.45λ
)とGaAsの格子定数(約5.65人)に差があるた
め低転位のG a A a層が得られていな ・い。そ
こで第2図に示すように8i基板4上に電子ビームスバ
ッタ法を用いてGaAsと格子定数が近いGe層5を蒸
着し、Ge層層上上G a A s層6を形成する試み
がなされている。(例えば、固体素子コンファレンス、
アブストラフ)、115−119ページ、神戸、198
4年) 〔発明が解決しようとする問題点〕 このとき、Si基板上に直接GaAsf形成するのに比
較して低転位のGaAs層が得られるが、GeとSi界
面の格子不整のためFET、半導体レーザ等の素子のた
めの結晶としては転位密度は太きすぎ、良好な素子特性
が得られていない。
Recently, technology for integrating conventional (7) ICs and optical semiconductor elements such as GaAs/AlGaAs systems has begun to be developed. For this reason, research is being carried out to form GaAs crystals on Si substrates using vapor phase epitaxy, molecular beam epitaxial methods, etc.;
) and GaAs (approximately 5.65), a low-dislocation GaA layer cannot be obtained. Therefore, as shown in FIG. 2, an attempt was made to deposit a Ge layer 5 having a lattice constant similar to that of GaAs on an 8i substrate 4 using an electron beam scattering method, thereby forming a Ga As layer 6 on the Ge layer. ing. (For example, Solid State Devices Conference,
Abstraf), pp. 115-119, Kobe, 198
4 years) [Problems to be solved by the invention] At this time, a GaAs layer with lower dislocations can be obtained compared to forming GaAsf directly on a Si substrate, but due to the lattice mismatch at the interface between Ge and Si, FET, The dislocation density is too thick for crystals for devices such as semiconductor lasers, and good device characteristics cannot be obtained.

本発明の目的は、上記の問題点を解決し、81基板の上
に低転位、高品質のG a A 8 /AlxGa 1
−XAS層を形成する結晶成長方法を提供することであ
る。
The purpose of the present invention is to solve the above-mentioned problems and to fabricate low-dislocation, high-quality Ga A 8 /AlxGa 1 on an 81 substrate.
- To provide a crystal growth method for forming an XAS layer.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、8i基板上に5iyGex−y′f:形成し
8i基板側においてy=lとしてy==Qまで漸次変化
させたバッファ層とし、このうちG a A s層又は
hl xGa t−xAs層を形成するものである。こ
の結晶成長法においてはバッファ層8iyGel−yの
組成変化はバッファ層内において転位が発生しない程度
にゆるやかであることが必要である。5iyGez−y
  の形成法としては、分子ビームエピタキシャル法を
用いてもよ(、8iH4、GeH4等のガスを用いた気
相成長法を用いてもよい。
In the present invention, 5iyGex-y'f: is formed on the 8i substrate, and the buffer layer is gradually changed to y==Q with y=l on the 8i substrate side. It forms a layer. In this crystal growth method, it is necessary that the compositional change of the buffer layer 8iyGel-y be gentle enough to prevent dislocations from occurring within the buffer layer. 5iyGez-y
A molecular beam epitaxial method may be used as a method for forming (a vapor phase growth method using a gas such as 8iH4, GeH4, etc.) may be used.

〔作用〕[Effect]

先に述べたように8iの格子定数は5.45人。 As mentioned earlier, the lattice constant of 8i is 5.45 people.

Ge、GaAsの格子定数は約5.65人 である。S
tとGeは4族元素であシ、同じせん亜鉛構造の結晶構
造をもつため、5iyGel−y はせん亜鉛構造を保
ちつつ格子定数をSiとGeの格子定数の間で変えるこ
とができる。そのためSi基板側の8iyGel−yの
yO値t−1として)”t−0f−1[るやかに変化さ
せ九バッファ層を形成すれば、格子歪はバッファ層内で
吸収され、バッファ層上に形成されるG a A s結
晶に歪は受けつがれない。以上の理由によl) 、8 
i yGe t−yバッファ層を介在させることによっ
て81基板上に低転位のGaAs層やkl xGa 1
−xAs NIを形成することができる。
The lattice constant of Ge and GaAs is approximately 5.65. S
Since t and Ge are Group 4 elements and have the same crystalline structure of the zinc oxide structure, 5iyGel-y can change the lattice constant between the lattice constants of Si and Ge while maintaining the zinc oxide structure. Therefore, if the yO value t-1 of 8iyGel-y on the Si substrate side is changed gradually and a nine buffer layer is formed, the lattice strain will be absorbed within the buffer layer, and the lattice strain will be absorbed on the buffer layer. Strain cannot be inherited by GaAs crystals formed in 1), 8 for the above reasons.
By interposing the i yGe ty buffer layer, a low dislocation GaAs layer or kl xGa 1 is formed on the 81 substrate
-xAs NI can be formed.

〔実施例〕〔Example〕

以下、図面を用いて本発明の結晶成長方法を説明する。 Hereinafter, the crystal growth method of the present invention will be explained using the drawings.

以下の説明においては分子ビームエピタキシャル法を用
いた例について述べる。第1図は本発明の方法によって
製作した半導体結晶の断面図である。Sl基板1を55
0℃ に加熱した状態で8iビームをあてStのエピタ
キシャル成長を開始し、Geビームを除々に増していき
、Siビームを減少させていく。こうしてSiから組成
の除々に変化した8iyGet−y層 を形成して、最
後にGet成長する。こののちAsビームとGaビーム
を当ててGaAs層3を成長する。G a A s層の
代シにAlxGa t−xAs層を成長するには、As
、Gaおよびhtの各ビームを当ててやればよい。
In the following explanation, an example using the molecular beam epitaxial method will be described. FIG. 1 is a cross-sectional view of a semiconductor crystal manufactured by the method of the present invention. Sl substrate 1 55
While heated to 0° C., an 8i beam is applied to start epitaxial growth of St, the Ge beam is gradually increased, and the Si beam is decreased. In this way, an 8iyGet-y layer whose composition is gradually changed from Si is formed, and finally Get-grown. Thereafter, a GaAs layer 3 is grown by applying an As beam and a Ga beam. To grow an AlxGa t-xAs layer in place of the GaAs layer, As
, Ga, and ht beams.

〔発明の効果〕〔Effect of the invention〕

本発明の実施によシ作成されるGaAs 、 AxGa
 1−xAs層は格子歪が8iyGel−yバッファ層
によシ吸収されるため低転位高品質のものとなる。本発
明は8iICとGaA1  IC,8iICとGaAs
/AjGaAs系光半導体素子の集積化に応用できる。
GaAs, AxGa produced by practicing the present invention
Since the lattice strain of the 1-xAs layer is absorbed by the 8iyGel-y buffer layer, the 1-xAs layer has low dislocations and high quality. The present invention uses 8iIC and GaA1 IC, 8iIC and GaAs
/Aj It can be applied to the integration of GaAs-based optical semiconductor devices.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る8iyGe1−y t−バッファ
層として用いたSt基板上のGmAs形成法を示し、第
2図は従来技術によるGeをバッファ層として用いたS
t基板上のG!IA8形成法を示す。 1 、 4 =・・・−8i基板、2−・−8i yG
e t−y層。 3.6・・・・・・G a A s層、5・・・・・・
Ge層。
Figure 1 shows a method for forming GmAs on a St substrate used as a 8iyGe1-y t-buffer layer according to the present invention, and Figure 2 shows a method for forming GmAs on a St substrate using Ge as a buffer layer according to the prior art.
G on the t board! The IA8 formation method is shown. 1, 4 =...-8i board, 2--8i yG
e ty layer. 3.6...G a As layer, 5...
Ge layer.

Claims (1)

【特許請求の範囲】[Claims] Si基板上にGaAs層又はAl_xGa_1_−_x
As層を形成するに際して、バッファ層としてSi_y
Ge_i_−_yを設け、Si基板側からy=1からy
=0まで漸次変化させることを特徴とする半導体結晶の
成長方法。
GaAs layer or Al_xGa_1_-_x on Si substrate
When forming the As layer, Si_y is used as a buffer layer.
Ge_i_-_y is provided, and from y=1 to y from the Si substrate side
1. A method for growing a semiconductor crystal, characterized by gradually changing the crystal value to 0.
JP22623585A 1985-10-11 1985-10-11 Growth of semiconductor crystal Pending JPS6287490A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22623585A JPS6287490A (en) 1985-10-11 1985-10-11 Growth of semiconductor crystal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22623585A JPS6287490A (en) 1985-10-11 1985-10-11 Growth of semiconductor crystal

Publications (1)

Publication Number Publication Date
JPS6287490A true JPS6287490A (en) 1987-04-21

Family

ID=16842010

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22623585A Pending JPS6287490A (en) 1985-10-11 1985-10-11 Growth of semiconductor crystal

Country Status (1)

Country Link
JP (1) JPS6287490A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04233720A (en) * 1990-08-02 1992-08-21 American Teleph & Telegr Co <Att> Semiconductor device and manufacture thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04233720A (en) * 1990-08-02 1992-08-21 American Teleph & Telegr Co <Att> Semiconductor device and manufacture thereof
US5158907A (en) * 1990-08-02 1992-10-27 At&T Bell Laboratories Method for making semiconductor devices with low dislocation defects
US5285086A (en) * 1990-08-02 1994-02-08 At&T Bell Laboratories Semiconductor devices with low dislocation defects

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