JPS6284937U - - Google Patents
Info
- Publication number
- JPS6284937U JPS6284937U JP17673285U JP17673285U JPS6284937U JP S6284937 U JPS6284937 U JP S6284937U JP 17673285 U JP17673285 U JP 17673285U JP 17673285 U JP17673285 U JP 17673285U JP S6284937 U JPS6284937 U JP S6284937U
- Authority
- JP
- Japan
- Prior art keywords
- support
- semiconductor device
- chip
- device chip
- wiring pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 4
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Die Bonding (AREA)
- Non-Volatile Memory (AREA)
- Solid State Image Pick-Up Elements (AREA)
Description
第１図は本考案の一実施例を示す要部断面図、
第２図は本考案の他の実施例を示す要部断面図で
ある。
２，１２……支持体、４……配線パターン、６
……半導体装置チツプ、８……バンプ、１４……
光透過性の窓。
FIG. 1 is a cross-sectional view of essential parts showing an embodiment of the present invention;
FIG. 2 is a sectional view of a main part showing another embodiment of the present invention. 2, 12...Support, 4...Wiring pattern, 6
...Semiconductor device chip, 8...Bump, 14...
Light-transmitting windows.
Claims (1)
いる半導体装置チツプがその表面を前記支持体に
向けてフリツプチツプ方式で接続されており、 前記支持体のうち、少なくとも前記半導体装置
チツプと対向する部分が光透過性になつている半
導体装置。[Claims for Utility Model Registration] A semiconductor device chip using light is connected to a wiring pattern formed on a support by a flip-chip method with its surface facing the support, and at least one of the support A semiconductor device in which a portion facing the semiconductor device chip is optically transparent.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17673285U JPS6284937U (en) | 1985-11-15 | 1985-11-15 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17673285U JPS6284937U (en) | 1985-11-15 | 1985-11-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6284937U true JPS6284937U (en) | 1987-05-30 |
Family
ID=31117262
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17673285U Pending JPS6284937U (en) | 1985-11-15 | 1985-11-15 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6284937U (en) |
-
1985
- 1985-11-15 JP JP17673285U patent/JPS6284937U/ja active Pending