JPS6276780A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To control a distance between a gate and source.drain uniformly to a small value by forming a resist film coated on a part of a gate electrode and a drain region on an insulating film formed on the entire surface of a substrate including the gate electrode, anisotropically etching it, and with the remaining insulating film as a mask forming source.drain. CONSTITUTION:An N-type active layer 2 and a gate electrode 3 are formed on a GaAs substrate 1. After an insulating film 4 is formed on the entire substrate 1 including the electrode 3, a photoresist film 5 is formed, patterned to coat parts of the electrode 3 and a drain region. With the film 5 as a mask and the film 4 remains on the lower side of the resist 5 and the side of the source of the electrode 3 by anisotropically etching. With the film 4 as a mask the substrate 1 is crystalline-grown to form N-type high density layers 6, 7 as source.drain. Then, ohmics 8, 9 of the source.drain are formed, and source.drain electrodes 11, 12 are formed through an interlayer insulating film 10 to obtain an FET.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device having a Schottky junction field effect transistor, and in particular to a method for manufacturing a semiconductor device having a Schottky junction field effect transistor.
The present invention relates to a method of manufacturing a semiconductor device in which a drain and a drain are configured to be offset.

[Conventional technology]

In order to improve the performance of a Schottky junction field effect transistor, it is necessary to reduce the parasitic resistance between the gate and the source/drain, and to reduce the capacitance between the gate and the source/drain at a given gate length and a given concentration active layer. Needed. To achieve this, it is required that the distance between the gate and the high concentration region on the source side be extremely small, with good reproducibility and uniformity, and that the distance between the gate and the high concentration region on the drain side be widened to some extent. A field effect transistor with a so-called offset structure has been proposed.

By the way, in the conventional manufacturing method of field effect transistors, photolithography technology is used to form the source and drain, and each high concentration region of the source and drain is formed using a patterned photoresist or the like as a mask. A method is used in which sources and drains are formed at desired positions on both sides of the gate. It has been proposed that this method be used to manufacture the above-mentioned offset type field effect transistor.

Another method for manufacturing field effect transistors is to etch back the insulating film deposited on the gate, form spacers made of this insulating film on both sides of the gate, and use the spacers as a mask to form high-concentration layers for each source and drain. There is also a method of forming regions, and the use of this method is also being considered.

[Problem that the invention seeks to solve]

Among the conventional manufacturing methods mentioned above, in the former method, it is difficult to obtain high accuracy in aligning the photoresist mask with respect to the gate in photolithography technology, so the distance between the gate and the source is required to be particularly small. There is a problem in that the characteristics differ from substrate to substrate, resulting in variations in device characteristics.

Further, in the latter method, although the source and drain can be formed by self-alignment, the insulating films on both sides of the gate are formed symmetrically, so there is a problem that it is not suitable for an offset structure.

° (Means for Solving the Problems) The method for manufacturing a semiconductor device of the present invention is a Schottky junction field effect device that achieves high performance by controlling the distance between the gate and the source/drain with high precision and without variations in device characteristics. In order to manufacture a transistor, an insulating film is formed on the entire surface including the gate electrode, and a resist film is formed on the insulating film so as to cover each part of the gate electrode and the drain region.
Using this resist film, the insulating film is anisotropically etched to leave an insulating film under the resist and on the side of the gate electrode, and this remaining insulating film is used as a mask to form a source/drain. .

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a cross-sectional view of a Schottky junction field effect transistor manufactured by the method of the present invention, and FIGS. 2 to 5 are diagrams explaining the manufacturing method in the order of steps, and in each figure (a) is a plan view. , (b) shows a cross-sectional view.

First, as shown in FIG. 2, an N-type active layer 2 is formed on a GaAs semi-insulating (100) substrate 1, and selective ion implantation and annealing are performed. Then, after depositing a glue frac metal such as tungsten silicide, this is patterned by reactive ion etching (RIE).
Gate electrode 3 is formed.

Next, as shown in FIG. 3, after forming an insulating film 4 such as a silicon oxide film on the entire surface including the gate electrode 3, a photoresist film 5 is formed thereon, and this photoresist film 5 is developed to form a predetermined shape. form into a pattern. This pattern of the photoresist film 5 does not exist on the gate 1 or 3 on the source side, but has an opening at a position lateral to the gate electrode 3 corresponding to the source formation region. Further, on the drain side, a photoresist film 5 is left so as to cover a part of the gate electrode 3 or a part of the side edge of the gate electrode 3, and at a position outside of the photoresist film 5, a portion corresponding to the drain formation region is opened. There is.

Thereafter, the insulating film 4 is anisotropically etched using the photoresist film 5. This anisotropic etching is performed using a gas system that can etch only the insulating film 4 without substantially etching the gate electrode 3 and the substrate 1, such as Freon and a mixed gas of Freon and hydrogen or oxygen.
This is done using the IE method. As a result, the photoresist film 5
4, the insulating film 4 not only remains in the area surrounding the source/drain formation region, but also remains as a so-called spacer on the side surface of the gate electrode 3 on the source side. Further, it remains on a portion of the upper surface or side surface of the drain side and a portion of the side edge thereof.

Then, crystal growth is selectively performed on the exposed surface of the substrate 1 using the insulating film 4 as a mask. This crystal growth method includes A
S H! TMG H282S e series MOCV
Use method D (TMG: trimethyl gallium). After that, if the insulating film 4 is removed by hydrofluoric acid treatment, the N-type high concentration layers 6 and
7 can be formed.

Thereafter, in the same way as the manufacturing method of a normal GaAs Schottky junction field effect transistor, an ohmic metal such as AuGe/Ni is formed by the lift-off method and alloyed, and each ohmic metal 8, 9 of the source and drain is formed. After depositing the interlayer insulating film 10, the transistor shown in FIG. 1 can be completed by forming source/drain electrodes 11 and 12 having a Ti/Pt/Au structure with openings above the source and drain. .

Therefore, in the Schottky junction field effect transistor completed in this way, the distance LSG between the gate electrode 3 and the high concentration source layer 6 is made approximately equal to the thickness of the insulating film 4, and The distance LGo between the drain high concentration layer 7 and the drain high concentration layer 7 is made approximately equal to the pattern formation dimension of the photoresist film 5. Therefore, the high concentration source layer 6 can be formed by a self-alignment method using an insulating film, so that the distance L-sc can be made extremely small. Also,
The drain high concentration layer 7 can be formed using photolithography technology, and the distance 1-co can be formed to have an arbitrary dimension.

As a result, the distance between the gate electrode 3 and the high concentration source layer 6 can be configured to be extremely small with good uniformity, and the distance between the gate electrode 3 and the high concentration drain layer 7 can be configured to be large within the range of normal photolithography overlay accuracy. , and a desired offset structure can be obtained. Moreover, this manufacturing process requires only one photolithography process, and can be easily manufactured without increasing the number of steps compared to conventional methods.

Note that a silicon nitride film can also be used as the insulating film 4.

〔Effect of the invention〕

As explained above, in the present invention, an insulating film is formed on the entire surface including the gate electrode, and a resist film is formed on the insulating film so as to cover each part of the gate electrode and the drain region. The insulating film is anisotropically etched using a film to leave an insulating film under the resist and on the sides of the gate electrode, and the remaining insulating film is used as a mask to form the source and drain. The distance to the source can be uniformly controlled to an extremely small value using the self-alignment method, while the distance between the gate electrode and the drain can be precisely controlled to any value within the accuracy of photolithography technology, creating the desired offset structure. Schottky junction field effect transistors can be manufactured. Further, since the photolithography process is used only once, manufacturing can be easily performed without increasing the number of steps compared to conventional methods.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of a Schottky junction field effect I-transistor with an offset structure manufactured by the method of the present invention, and FIG.
Figures to Figures 5 are diagrams showing the method of the present invention in the order of steps, and each figure (
(a) is a plan view, and (b) is a cross-sectional view. 1... GaAs semi-insulating substrate, 2... N-type active layer,
3... Gate electrode, 4... Insulating film, 5... Photoresist film, 6... Source high concentration layer, 7... Drain high concentration layer, 8... Source ohmic, 9... - Drain ohmic, 10... interlayer insulating film, 11... source electrode, 12... drain electrode. Figure 1 LsGLGhi

Claims (1)

[Claims] 1. A method for manufacturing a field effect transistor with an offset structure, including the step of forming an insulating film on the entire surface of the substrate including the gate electrode formed on the substrate, and forming the gate electrode on the insulating film. a step of forming a resist film so as to cover a part of the drain region and a subsequent part of the drain region; using this resist film as a mask, the insulating film is anisotropically etched to form a source under the resist and the source of the gate electrode; A method for manufacturing a semiconductor device, comprising the steps of: leaving the insulating film on the side edges; and forming a source/drain by selectively growing crystals on the substrate using the remaining insulating film as a mask. . 2. The method of manufacturing a semiconductor device according to claim 1, wherein a reactive ion etching method using a Freon gas system is used for anisotropic etching of the insulating film.