JPS6273744A - Forming method for metal wiring pattern - Google Patents
Forming method for metal wiring patternInfo
- Publication number
- JPS6273744A JPS6273744A JP21531885A JP21531885A JPS6273744A JP S6273744 A JPS6273744 A JP S6273744A JP 21531885 A JP21531885 A JP 21531885A JP 21531885 A JP21531885 A JP 21531885A JP S6273744 A JPS6273744 A JP S6273744A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- photoresist
- organic solvent
- film
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は金属配線パターンの形成方法に関し、特に配線
の多層化、高密度化、信頼性の向−Ｅに有力な効果を発
揮する半導体集積回路の金属配線パターンの形成方法に
関するものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for forming a metal wiring pattern, and in particular, to a method for forming a metal wiring pattern, and particularly to a method for forming a semiconductor integrated circuit, which is effective in increasing the number of layers of wiring, increasing the density, and improving reliability. The present invention relates to a method of forming a metal wiring pattern for a circuit.
従来、半導体集積回路の金属配線パターンの形成方法は
、−ｉに基板上にフォトレジストのパターンを形成し、
その基板上全面に金属膜を被着し、上記フォトレジスト
の残存する部分の金属膜をフォトレジストと共に剥離し
て金属配線パターンを形成する所謂リフトオフ方式が実
施されていた。Conventionally, a method for forming a metal wiring pattern for a semiconductor integrated circuit is to form a photoresist pattern on a substrate at -i,
A so-called lift-off method has been practiced in which a metal film is deposited on the entire surface of the substrate, and the metal film on the remaining portion of the photoresist is peeled off together with the photoresist to form a metal wiring pattern.
上述した金属配線パターンの形成方法においては、配線
が微細化、高密度化するにつれて、あるい・は金属膜の
被着条件の何如によって、上記金属膜の選択的剥Ｍ（以
下リフトオフと記す）が困難になり、微細配線部分での
リフトオフが不完全となりやすいという欠点があった。In the method for forming a metal wiring pattern described above, as the wiring becomes finer and denser, or depending on the deposition conditions of the metal film, the metal film may be selectively peeled off (hereinafter referred to as lift-off). This has the drawback that lift-off at fine wiring portions tends to be incomplete.
この様な欠点を除く方法としては、従来フォトレジスト
のパターン形成後基板をＣＦ４を含むプラズマに曝す処
理によってフォトレジストと被着金属膜の密着性を低下
させ、リフトオフを容易にする方法が知られている。し
かし、この方法によると基板表面と被着金属膜の密着性
まで低下し、配線の信頼性に悪影響を及ぼしたり、又特
に基板表面がシリコン窒化膜の場きにはシリコン窒化膜
がエツチングされてしまうという欠点があった。As a method for eliminating such defects, conventionally known methods include exposing the substrate to plasma containing CF4 after patterning the photoresist to reduce the adhesion between the photoresist and the deposited metal film to facilitate lift-off. ing. However, with this method, the adhesion between the substrate surface and the deposited metal film deteriorates, which adversely affects the reliability of the wiring, and especially when the substrate surface is a silicon nitride film, the silicon nitride film is etched. There was a drawback that it could be stored away.
本発明は上記のような欠点を除き、微細な金属配線パタ
ーンを歩留り良く、又信頼性高く形成する方法を提供す
ることを目的とする。An object of the present invention is to eliminate the above-mentioned drawbacks and provide a method for forming fine metal wiring patterns with high yield and reliability.
本発明の金属配線パターンの形成方法は、基板上にフォ
Ｉ・レジストのパターンを形成する工程と、該基板に金
属膜を被着する工程と、超音波で励振した有機溶剤中に
前記基板を浸漬して前記金属膜を選択的に除去する工程
とを含んで構成される。The method for forming a metal wiring pattern of the present invention includes the steps of forming a photoresist pattern on a substrate, depositing a metal film on the substrate, and placing the substrate in an organic solvent excited by ultrasonic waves. The method includes a step of selectively removing the metal film by immersion.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の一実施例を説明するための途中主要工
程の概念図、第２図及至第５図は本発明の一実施例を説
明するために工程順に示した断面図である１本実施例で
は集積回路のチタン・白金配線パターンの形成に適用し
た場合について説明する。FIG. 1 is a conceptual diagram of main steps in the process to explain an embodiment of the present invention, and FIGS. 2 to 5 are cross-sectional views shown in order of steps to explain an embodiment of the present invention. In this embodiment, a case where the present invention is applied to the formation of a titanium/platinum wiring pattern of an integrated circuit will be explained.
まず、第２図に示すように、シリコン基板１−ヒにシリ
コン酸化膜２及びシリコン窒化膜３を形成し、これにス
ピンコード法等でポジ型フォトレジスト４を被着する。First, as shown in FIG. 2, a silicon oxide film 2 and a silicon nitride film 3 are formed on a silicon substrate 1-1, and a positive photoresist 4 is deposited thereon by a spin code method or the like.
次に、第３図に示すように、フォトマスク７を通してフ
ォトレジスト４に選択的に紫外線を照射する。Next, as shown in FIG. 3, the photoresist 4 is selectively irradiated with ultraviolet light through the photomask 7.
次に、第４図に示すように、紫外線を照射した基板をア
ルカリ性現像液に浸漬すると露光部のフォトレジストが
溶解し、フォトレジストパターン４１が形成される。次
にフォトレジス１〜中の有機溶剤を揮発させるために１
３０℃３０分程度の熱程度を行った後、高周波スパッタ
法によりチタン・白金膜５，６を例えば各々］、 ＯＯ
ｎ ｍ程度被着する。Next, as shown in FIG. 4, when the substrate irradiated with ultraviolet rays is immersed in an alkaline developer, the photoresist in the exposed areas is dissolved and a photoresist pattern 41 is formed. Next, in order to volatilize the organic solvent in photoresist 1~
After heating at 30° C. for about 30 minutes, titanium/platinum films 5 and 6 are formed by high-frequency sputtering, for example, respectively], OO.
Approximately nm is deposited.
次に、第１図に示すように、第４図に示す基板を数十〜
数百ＫＨ２の超音波で励振されたメチルエチルケトン等
の有機溶剤ｌｌ中に浸漬する。なお１０は超音波振動子
である。Next, as shown in FIG. 1, several dozen to
It is immersed in an organic solvent such as methyl ethyl ketone excited by several hundred KH2 ultrasonic waves. Note that 10 is an ultrasonic transducer.
この工程では、従来技術では超音波を使用しないためリ
フトオフが不完全となり易いが、本発明では超音波によ
りリフトオフが促進されるため、微細のパターンが容易
にリフトオフできる。In this process, lift-off tends to be incomplete because the conventional technique does not use ultrasonic waves, but in the present invention, lift-off is promoted by ultrasonic waves, so that fine patterns can be easily lifted off.
次に、さらに有機溶剤又は酸素プラズマでフォトレジス
トを完全に除去すれば第５図に示すようなチタン・白金
配線パターン５２．６２が形成できる。Next, if the photoresist is completely removed using an organic solvent or oxygen plasma, titanium/platinum wiring patterns 52 and 62 as shown in FIG. 5 can be formed.
以上は、本発明を半導体集積回路のチタン・白金配線パ
ターンの形成に適用する場合の方法を述べたが、その他
の基板、その池の金属膜のパターンを形成する場合も同
様に実施できる事は明らかである。The above describes a method in which the present invention is applied to the formation of titanium/platinum wiring patterns for semiconductor integrated circuits, but the same method can be applied to the formation of patterns for other substrates and metal films thereof. it is obvious.
以上説明した様に、本発明によれば、リフｌ−オフが非
常に容易になるので、微細な金属配線パターンを容易に
歩留りよく形成することができる。As described above, according to the present invention, ref-1-off becomes very easy, so that fine metal wiring patterns can be easily formed with a high yield.
第１図は本発明の一実施例を説明するための途中主要工
程の概念図、第２図及至第５図は本発明の一実施例を説
明するために工程順に示した断面図である。
１・・・シリコン基板、２・・・シリコン酸化膜、３・
・・シリコン窒化膜、４・・・フォトレジスト、４１・
・・フォトレジストパターン、５・−・チタン膜、６・
・・白金膜、５１．６−１・・・フォトレジスト上のチ
タン膜及び白金膜、５２．６２・・・バターニングされ
たチタン膜及び白金膜、７・・・フォトマスク。
代理人 弁理士 内 原 習
庫２ 回
斗３ 凹
茅４ 図
坪５図FIG. 1 is a conceptual diagram of main steps in the process for explaining an embodiment of the present invention, and FIGS. 2 to 5 are cross-sectional views shown in order of steps for explaining an embodiment of the present invention. 1... Silicon substrate, 2... Silicon oxide film, 3.
...Silicon nitride film, 4...Photoresist, 41.
・・Photoresist pattern, 5・−・Titanium film, 6・
...Platinum film, 51.6-1...Titanium film and platinum film on photoresist, 52.62...Buttered titanium film and platinum film, 7...Photomask. Agent Patent Attorney Uchihara Shukou 2 Kaito 3 Kokyo 4 Tutsubo 5
Claims (1)
該基板に金属膜を被着する工程と、超音波で励振された
有機溶剤中に前記基板を浸漬して前記金属膜を選択的に
除去する工程とを含むことを特徴とする金属配線パター
ンの形成方法。forming a photoresist pattern on the substrate;
A metal wiring pattern comprising the steps of depositing a metal film on the substrate and selectively removing the metal film by immersing the substrate in an organic solvent excited by ultrasonic waves. Formation method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21531885A JPS6273744A (en) | 1985-09-27 | 1985-09-27 | Forming method for metal wiring pattern |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21531885A JPS6273744A (en) | 1985-09-27 | 1985-09-27 | Forming method for metal wiring pattern |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6273744A true JPS6273744A (en) | 1987-04-04 |
Family
ID=16670322
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21531885A Pending JPS6273744A (en) | 1985-09-27 | 1985-09-27 | Forming method for metal wiring pattern |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6273744A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100629021B1 (en) * | 1997-09-03 | 2006-11-30 | 지멘스 악티엔게젤샤프트 | Structuring method |
| JP2012190905A (en) * | 2011-03-09 | 2012-10-04 | Hitachi Cable Ltd | Method of manufacturing semiconductor light-emitting element |
-
1985
- 1985-09-27 JP JP21531885A patent/JPS6273744A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100629021B1 (en) * | 1997-09-03 | 2006-11-30 | 지멘스 악티엔게젤샤프트 | Structuring method |
| JP2012190905A (en) * | 2011-03-09 | 2012-10-04 | Hitachi Cable Ltd | Method of manufacturing semiconductor light-emitting element |
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