JPS6266443U - - Google Patents

Info

Publication number
JPS6266443U
JPS6266443U JP15708785U JP15708785U JPS6266443U JP S6266443 U JPS6266443 U JP S6266443U JP 15708785 U JP15708785 U JP 15708785U JP 15708785 U JP15708785 U JP 15708785U JP S6266443 U JPS6266443 U JP S6266443U
Authority
JP
Japan
Prior art keywords
signal
units
signal transmission
circuit
criterion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15708785U
Other languages
Japanese (ja)
Other versions
JPH0349485Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15708785U priority Critical patent/JPH0349485Y2/ja
Publication of JPS6266443U publication Critical patent/JPS6266443U/ja
Application granted granted Critical
Publication of JPH0349485Y2 publication Critical patent/JPH0349485Y2/ja
Expired legal-status Critical Current

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  • Detection And Prevention Of Errors In Transmission (AREA)
  • Small-Scale Networks (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例を示すブロツク図、
第２図は従来の信号伝送方式を示すブロツク図で
ある。 １０，２０，３０……装置を構成するユニツト
、１１……ユニツト１０の送信部、２１，２２，
２３……ユニツト２０のラツチ回路、２４，３４
……判定回路、２５，３５……ラツチ制御用デコ
ード回路、２６，３６……ラツチ制御用デコード
回路、２７，２８，２９ａ，２９ｂ……ユニツト
２０のＮＡＮＤゲート、３１，３２，３３……ユ
ニツト３０のラツチ回路、３７，３８，３９ａ，
３９ｂ……ユニツト３０のＮＡＮＤゲート。 FIG. 1 is a block diagram showing an embodiment of the present invention.
FIG. 2 is a block diagram showing a conventional signal transmission system. 10, 20, 30...Units constituting the device, 11...Transmission section of unit 10, 21, 22,
23... Latch circuit of unit 20, 24, 34
...Determination circuit, 25, 35... Decode circuit for latch control, 26, 36... Decode circuit for latch control, 27, 28, 29a, 29b... NAND gate of unit 20, 31, 32, 33... Unit 30 latch circuits, 37, 38, 39a,
39b...NAND gate of unit 30.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 多数のユニツト間で信号を授受する信号伝送方
式において、他のユニツトからの信号を格納する
複数のメモリ回路と、判定基準にヒステリシス特
性を有し、前記メモリ回路の出力により前記信号
の内容を判定する判定回路とを備え、前記信号に
対する誤動作保護機能を有することを特徴とする
信号伝送方式。 In a signal transmission system that sends and receives signals between a large number of units, the system includes multiple memory circuits that store signals from other units and has hysteresis characteristics as a criterion, and determines the content of the signal based on the output of the memory circuit. 1. A signal transmission method comprising: a determination circuit for determining the signal, and having a malfunction protection function for the signal.
JP15708785U 1985-10-16 1985-10-16 Expired JPH0349485Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15708785U JPH0349485Y2 (en) 1985-10-16 1985-10-16

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15708785U JPH0349485Y2 (en) 1985-10-16 1985-10-16

Publications (2)

Publication Number Publication Date
JPS6266443U true JPS6266443U (en) 1987-04-24
JPH0349485Y2 JPH0349485Y2 (en) 1991-10-22

Family

ID=31079310

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15708785U Expired JPH0349485Y2 (en) 1985-10-16 1985-10-16

Country Status (1)

Country Link
JP (1) JPH0349485Y2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6313446A (en) * 1986-07-03 1988-01-20 Fujitsu Ltd Data error correcting circuit
WO1991010302A1 (en) * 1989-12-27 1991-07-11 Kabushiki Kaisha Komatsu Seisakusho Data input control device for serial controller

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6313446A (en) * 1986-07-03 1988-01-20 Fujitsu Ltd Data error correcting circuit
WO1991010302A1 (en) * 1989-12-27 1991-07-11 Kabushiki Kaisha Komatsu Seisakusho Data input control device for serial controller

Also Published As

Publication number Publication date
JPH0349485Y2 (en) 1991-10-22

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