JPS6255185B2 - - Google Patents

Info

Publication number
JPS6255185B2
JPS6255185B2 JP14430782A JP14430782A JPS6255185B2 JP S6255185 B2 JPS6255185 B2 JP S6255185B2 JP 14430782 A JP14430782 A JP 14430782A JP 14430782 A JP14430782 A JP 14430782A JP S6255185 B2 JPS6255185 B2 JP S6255185B2
Authority
JP
Japan
Prior art keywords
request
memory
field
data
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP14430782A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5935261A (ja
Inventor
Teruo Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP14430782A priority Critical patent/JPS5935261A/ja
Publication of JPS5935261A publication Critical patent/JPS5935261A/ja
Publication of JPS6255185B2 publication Critical patent/JPS6255185B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP14430782A 1982-08-20 1982-08-20 メモリ制御方式 Granted JPS5935261A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14430782A JPS5935261A (ja) 1982-08-20 1982-08-20 メモリ制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14430782A JPS5935261A (ja) 1982-08-20 1982-08-20 メモリ制御方式

Publications (2)

Publication Number Publication Date
JPS5935261A JPS5935261A (ja) 1984-02-25
JPS6255185B2 true JPS6255185B2 (enrdf_load_stackoverflow) 1987-11-18

Family

ID=15359033

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14430782A Granted JPS5935261A (ja) 1982-08-20 1982-08-20 メモリ制御方式

Country Status (1)

Country Link
JP (1) JPS5935261A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS5935261A (ja) 1984-02-25

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