JPS6252648A - Transmitting device for data memory - Google Patents

Abstract

PURPOSE:To allow a data transmitting side to edit data and to shorten the data processing time by providing an address counter showing the address of a memory with a function adding specific values in the middle of transmitting data.. CONSTITUTION:Logic records are constructed with fields A and B, and continuously stored from the memory 1. When only fields A are continuously transmitted, a control part 3 receives and stores the total length of the data, its byte length and data on byte length of a field not to be transmitted. Then, when a data A11 in the memory 1 is transmitted, a data counter 6 and the address counter 9 are counted up to transmit two types of data A12 and A13. Realizing that the data of the prescribed byte length is transmitted, the control part 3 temporarily stops the count up of the address counter 9, adds the byte length of the field not to be transmitted to the address counter 9, and transmits data A22...A33.

Description

[Detailed description of the invention] [Field of application of the invention] The present invention relates to a data sending device for a memory, and more particularly to a data sending device for a memory.

The present invention relates to a memory data sending device having a data editing function by having a function of adding a specific value to an address counter during data sending.

[Background of the invention]

The conventional memory data transmission device was developed in U.S. Patent Application Publication No. 58-976
As disclosed in Publication No. 61, when reading and transmitting data stored in a continuous area of memory, the program can be intervened in sequentially by automatically incrementing the address counter that specifies the address of the memory. This eliminates the need for this system, reducing the load on the equipment and shortening the transmission time.

However, in the case where only a discontinuous part of the continuous data sent out from the memory is to be extracted and used for some processing, on the data receiving side, the necessary data must be extracted, i.e. Data needs to be edited.

Problems arise in that the program load increases and the data transfer time and data processing time increase.

[Purpose of the invention]

The present invention was made in view of the problems of the prior art described above, and reduces the program load on the data receiving side by editing the data on the data sending side without editing the data on the data receiving side. It is an object of the present invention to provide a memory data sending device capable of reducing data transfer time and data processing time.

[Summary of the invention]

The memory data sending device of the present invention is characterized by having a function of adding a specific value to an address counter that automatically counts up and designates a memory address during data sending.

[Embodiments of the invention]

Hereinafter, the present invention will be explained in more detail with reference to embodiments shown in the accompanying drawings.

1 is a block diagram showing a first embodiment of the memory data sending device of the present invention, and FIGS.
FIG. 2 is an explanatory diagram showing a specific example of data stored in the memory 1 in the figure. Before explaining the embodiment shown in FIG. 1, an outline of data editing to which the present invention relates will be explained using FIGS. 2 and 3.

Figure 2 shows a specific example of data stored in memory 1, which is comprised of a disk device, etc., and shows one out of a set of logical records consisting of three fields: name, annual income, and address. This shows the results of a search for logical records with an annual income of more than 7 million yen. In other words, the annual income is 70
More than 00,000 logical records are stored in the memory 1 in the order in which they were retrieved.

However, if the host device requests only the name of a person with an annual income of more than 7 million yen, it is necessary to send only the name field in one logical record and suppress the sending of the annual income and address fields. . To achieve this, assuming each field is 10 bytes, only the first 10 bytes of one logical record are sent to the upper device, and the remaining 2
0 bytes can be edited to be suppressed or skipped.

FIG. 3 shows the results of sorting the search results shown in FIG. 2 in descending order of annual income. Here, the above sorting process is executed as follows. That is, first 1
A new set of an annual income field and an address pointer indicating the start address of the logical record where the annual income exists is created.

Next, a microprogram or the like orders the pairs of fields and address pointers according to the value of annual income. The information ordered by the sorting process in this way is called sort information and is stored in the memory 1. Now, the host device is
If you need to obtain all logical records sorted in descending order of annual income or fields other than annual income, and only the sorted address pointers are requested, memory 1
However, in order to send only the address pointer part in the sort information and suppress or skip the annual income field,
All you have to do is edit it.

Above, using Figures 2 and 3, the outline of data editing,
Specific examples of data to be sent and other data have been explained. However, in explaining the embodiment shown in FIG. 1, the data examples shown in FIGS. 2 and 3 will be symbolized as shown in FIG. 4 in order to facilitate the explanation. That is, as shown in Figure 4, one logical record consists of 3 bytes of A
field (for example, consisting of data A, A, 2.A□, etc.) and a 2-byte B field (for example, consisting of data B
It is assumed that such a logical record group is stored consecutively from the 10th address of the memory 1.

Next, let us take as an example the case where only the A field from each logical record shown in Fig. 4 is continuously sent out with a total length of 9 bytes.
The embodiment shown in FIG. 1 will be described. In FIG. 1, the control unit 3 sends data indicating the total length (9 bytes) of data to be sent from the memory 1 via the command line 2, data indicating the byte length (3 bytes) of the field to be sent,
Data indicating the byte length (2 bytes) of the non-transmission target field is sequentially received from a higher-level device (not shown). Then, the control device 3 stores the above three data in the internal register.Next, the control device 3 resets the data counter 6.7 via the signal lines 4 and 5, and sends the signal lllA.
Send start address II to the address counter 9 via 3.
Set 101+. This completes the preparation for data transmission.

When transmitting data, first, the address t(10I+) set in the address counter 9 is input to the memory 1, and the data hole □ at the 10th address of the memory 1 is sent out via the data line 11. When the data counter 6.7 is sent out, the data counter 6.7 is sent via the signal lines 4 and 5.
Count up by one. At the same time, the address counter 9 is incremented by one via the signal line 12, and the contents indicate the address II 11 It. Thereafter, in the same way, data A 1 byte is added. , A1. is sent.

When the data A
is input. As a result, the control section 3 learns that the data has been sent by the byte length (3 bytes) of the field to be sent, and first, the control section 3 temporarily stops the count up of the address counter 9 via the signal line 14. A value #3 IT obtained by adding 1 to the byte length (2) of the non-transmission field stored in the register in the unit 3 is added to the contents of the address counter 9 via the signal line 15. As a result, the contents of the address counter 9 are changed to the address "
15'', the contents of the 15th address of memory 1, ie.

Data A2□ is sent. Also, at this point, the contents of the data counter 6 are reset.

Thereafter, similarly, data A□, A, 3, . . .
6 to the control unit 3, and the control unit 3 determines that all data has been sent, and ends the data sending operation. FIG. 5&q shows a time chart showing the above-described data sending operation.

In the manner described above, it is possible to continuously transmit only the target A field from the data group shown in FIG. 4.

In the first embodiment described above, when a predetermined value is added to the contents of the address counter 9 and addresses are read out discontinuously, the count-up of the address counter 9 is temporarily stopped. but.

The present invention is not limited to this, but for example, without stopping the count-up of the address counter 9,
The number of fields not to be sent may be added after the count-up.

Next, a second embodiment of the present invention will be described.

FIG. 6 is a block diagram showing a second embodiment of the present invention, in which only the periphery of the control section 3, which is different from the first embodiment shown in FIG. 1, is extracted and shown. As shown in the figure, the difference from the first embodiment is as follows.

A multistage register 21゜2 for queuing in the control unit 3
2 is provided. That is, the second example is
An editing function is provided by queuing fields to be sent from the memory 1 and fields not to be sent out in multistage registers 21 and 22 using the number of data.

For example, if you want to send names and addresses continuously from the logical record group shown in Figure 7, you can create a queue for the length of data to be sent (in bytes) and a queue for the length of data not to be sent (in bytes). number) and generates a multi-stage register 21.2
2, and is used by the control unit 3 as a comparison value with the count value of the data counter 6 and as an addition value for the address counter 9.

This allows editing processing to be executed.

Specifically, as shown in FIG. 6, the number of bytes of the name and address fields to be sent (10 bytes each) is stored in the lower two stages of the multi-stage register 21, and the number of bytes (each 10 bytes) is sent to the lower two stages of the multi-stage register 22. Stores the number of bytes in the annual income, gender, and occupation fields (9 bytes for annual income and gender, 7 bytes for occupation). Then, the number i of bytes in the final stage of the multistage register 21
t 1011 data transmission primary multi-stage register 22
Data transmission is stopped for the number of bytes in the final stage of 41917, and the number of bytes in the second lower stage of the multistage register is again It 10
Send data #j and repeat the same operation thereafter. This allows the name and address fields to be sent out consecutively, allowing for flexible editing. Note that if the first field of the logical record is not to be sent, addition to the address counter may be performed prior to sending the data.

Additionally, I would like to add that the above 1. The second example is.

This method skips the address of data that is not subject to transmission, but if a cyclic check or sum check of the memory is required, the data is skipped, that is, the data is not added to the address counter 9, and the necessary range is It is also possible to consider a method in which all data is read, and for data that is not to be transmitted, signals for transmitting the data, such as a data sync signal, timing signal, etc., are suppressed.

In this case as well, it is conceivable to respond by controlling the data sync signal or the like to switch between the permission time and the inhibition time based on the value of the data counter 9.

In addition, the above-mentioned 1. Regarding the data search method, sorting method, and data input method to memory described in the second embodiment, please refer to the above-mentioned 1. The method is not limited to the method described in the second embodiment.

Any item is fine.

[Effects of the Invention] According to the present invention, by providing a function of adding a specific value to an address counter indicating a memory address during data transmission, a data group stored in a contiguous area of the memory is added. It is possible to send out discontinuous parts of the data continuously, making it possible to provide editing functions to the data sending side. the result.

There is no need to edit data on the receiving side, making it possible to reduce the program load and the data transfer time and data processing time.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a first embodiment of the present invention, and FIGS. 2, 3, and 7 are diagrams showing specific examples of data stored in the memory in FIG. FIG. 4 is a diagram showing a model of data storage in memory, FIG. 5 is a time chart showing the operation of sending out the contents of the memory shown in FIG. 4 in FIG. 1, and FIG. FIG. 2 is a block diagram showing a second embodiment of the invention. 1...Memory, 3...Control unit, 6, 7...Data counter, 9...Address counter.

Claims (1)

[Claims] In a memory data sending device that automatically counts up an address counter that specifies a memory address and sequentially reads and sends data from consecutive addresses in the memory without program intervention, 2. A data sending device for a memory, comprising means for adding a predetermined value to the count value of the address counter in order to suppress sending of data at addresses in a predetermined range.