JPS6252646A - Detecting device for run away of processor - Google Patents

Detecting device for run away of processor

Info

Publication number
JPS6252646A
JPS6252646A JP60191768A JP19176885A JPS6252646A JP S6252646 A JPS6252646 A JP S6252646A JP 60191768 A JP60191768 A JP 60191768A JP 19176885 A JP19176885 A JP 19176885A JP S6252646 A JPS6252646 A JP S6252646A
Authority
JP
Japan
Prior art keywords
memory
parameters
parameter
written
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60191768A
Other languages
Japanese (ja)
Inventor
Hiroyuki Doi
裕幸 土井
Toshinori Nagasawa
長沢 利紀
Shigeyuki Miyazaki
重幸 宮崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chino Corp
Original Assignee
Chino Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chino Corp filed Critical Chino Corp
Priority to JP60191768A priority Critical patent/JPS6252646A/en
Publication of JPS6252646A publication Critical patent/JPS6252646A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To write a proper parameter without fail by collecting a preset parameter with the written one for a certain time when the set parameter is written in other memory areas. CONSTITUTION:The set parameter is stored in the 1st memory 1. A CPU 3 writes the parameter stored in the 1st memory 1 in the 2nd memory 2. Then the parameter in the memory 2 executes operation. Due to an interruption signal inputted at every certain interval from a timer 4, a processor 3 reads and collates the parameter in the memory 1 with the execution parameter in the memory 2. If the CPU 3 runs away and both parameters are not equal, the parameter in the memory 1 is written in the memory 2 and is corrected. When they are equal, the operation is executed.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は、マイクロコンピュータ等の処理装置の暴走
検知装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a runaway detection device for a processing device such as a microcomputer.

[従来の技術] マイクロコンピュータ等の処理装置(CPU)を用いた
調節計、記録計等の計器において、あらかじめRAM、
ROMのメモリのあるエリアに格納されたPID定数等
のパラメータ等を、別のメモリのエリアに書き込み、こ
れに基いて処理装置に各種測定動作を実行させるように
している。
[Prior Art] In instruments such as controllers and recorders that use a processing unit (CPU) such as a microcomputer, RAM,
Parameters such as PID constants stored in one area of the ROM memory are written to another area of the memory, and the processing device is caused to perform various measurement operations based on the parameters.

[この発明が解決しようとする問題点]しか−しながら
、別のエリアにパラメータを書き込む場合、電源ノイズ
や電波性ノイズの影響を受け、本来のデータと異ったデ
ータが古き込まれ、それを実行すると暴走状態となる場
合がある。
[Problems to be Solved by the Invention] However, when parameters are written in another area, data different from the original data may be written due to the influence of power supply noise or radio wave noise. Executing this may result in a runaway condition.

このため、一定の処理が完了するとパラメータを再設定
する方法もあるが、処理が長い場合、なかなか正しいデ
ータが再設定されなかったり、再設定されないプログラ
ムでは、いつまでも訂正されない問題点がある。
For this reason, there is a method of resetting the parameters after a certain processing is completed, but if the processing is long, it may be difficult to reset the correct data, or if the program does not reset the parameters, the problem may be that the corrections will not be made forever.

この発明の目的は、以上の点に鑑み、正しいパラメータ
で動作を実行させるようにした処理装置の暴走検知装置
を提供することである。
SUMMARY OF THE INVENTION In view of the above points, an object of the present invention is to provide a runaway detection device for a processing device that executes operations using correct parameters.

[問題点を解決するための手段] この発明は、設定されたパラメータを格納する第1のメ
モリと、この第1のメモリのパラメータが書き込まれる
第2のメモリと、一定間隔で入力に される信ρグリ第1のメモリのパラメータと第2のメモ
リのパラメータとを照合し、異っている場合に第1のメ
モリのパラメータを第2のメモリに書き込む処理装置と
を備えるようにした処理装置の暴走検知装置である。
[Means for Solving the Problems] This invention provides a first memory that stores set parameters, a second memory into which the parameters of the first memory are written, and a second memory that is input at regular intervals. A processing device that compares the parameters of a first memory with the parameters of a second memory, and writes the parameters of the first memory to the second memory if they are different. This is a runaway detection device.

[実施例1 第1図は、この発明の一実流例を示す説明図である。[Example 1 FIG. 1 is an explanatory diagram showing an example of the actual flow of the present invention.

第1図において、RO〜1のような、第1のメモリ1に
設定パラメータを格納し、動作開始時等に、マイクロコ
ンピュータのような処理9iffl(CPU>3により
、第1のメモリ1のパラメータをRAMのような第2の
メモリ2に書き込む。そして、この第2のメ[りのパラ
メータにより動作が実行される。イして、ハード的なタ
イマ4より一定の時間間隔で入力される割込信号により
、処理装置3は、第1のメモリ1の設定パラメータおよ
び第2のメモリ2の実行パラメータを読み出し、照合す
る。処理装置3が暴走し、両パラメータが一致していな
い場合は、第′1のメモリ1のパラメータを第2のメモ
リ2に書き込み、訂正を行う。両パラメータが一致して
いる場合は、動作を続行する。
In FIG. 1, setting parameters are stored in a first memory 1 such as RO~1, and at the start of operation, etc., a microcomputer-like process 9iffl (CPU > 3) stores the setting parameters in the first memory 1. is written into a second memory 2 such as a RAM. Then, the operation is executed according to the parameters of this second method. In response to the input signal, the processing device 3 reads out the setting parameters of the first memory 1 and the execution parameters of the second memory 2 and compares them.If the processing device 3 goes out of control and the two parameters do not match, the The parameters of memory 1 of '1 are written to the second memory 2 and corrected. If both parameters match, the operation continues.

これらの割込動作は、タイマ4よりの信号が来る毎にく
り返され、常に正しいパラメータで動作が行われる。
These interrupt operations are repeated every time a signal from the timer 4 arrives, and operations are always performed with correct parameters.

以上の動作は第2図に示されている。The above operation is shown in FIG.

なお、第3図で示すように第1のメモリ10にRA M
を用いるようにしてもよい。
Note that as shown in FIG. 3, the first memory 10 has RAM
You may also use

[発明の効果] 以上;ホべたように、この発明は、一定時間間隔で設定
パラメータと実行パラメータとの照合を行っているので
、常に正しいバラメークにより動作が実行され、高信頼
性の装置となる。
[Effects of the Invention] As mentioned above, this invention verifies the set parameters and execution parameters at regular intervals, so operations are always executed with the correct parameters, resulting in a highly reliable device. .

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図、第3図は、この発明の一実施例を示す
説明図である。
FIG. 1, FIG. 2, and FIG. 3 are explanatory diagrams showing one embodiment of the present invention.

Claims (1)

【特許請求の範囲】[Claims] 1.設定されたパラメータを格納する第1のメモリと、
この第1のメモリのパラメータが書き込まれる第2のメ
モリと、一定間隔で入力される信号により第1のメモリ
のパラメータと第2のメモリのパラメータとを照合し、
異なつている場合に第1のメモリのパラメータを第2の
メモリに書き込む処理装置とを備え、処理装置の暴走を
検知するようにした処理装置の暴走検知装置。
1. a first memory that stores set parameters;
A second memory into which the parameters of this first memory are written, and a signal inputted at regular intervals to compare the parameters of the first memory and the parameters of the second memory,
A runaway detection device for a processing device, comprising: a processing device that writes parameters of a first memory to a second memory when the parameters are different, and detects runaway of the processing device.
JP60191768A 1985-08-30 1985-08-30 Detecting device for run away of processor Pending JPS6252646A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60191768A JPS6252646A (en) 1985-08-30 1985-08-30 Detecting device for run away of processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60191768A JPS6252646A (en) 1985-08-30 1985-08-30 Detecting device for run away of processor

Publications (1)

Publication Number Publication Date
JPS6252646A true JPS6252646A (en) 1987-03-07

Family

ID=16280192

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60191768A Pending JPS6252646A (en) 1985-08-30 1985-08-30 Detecting device for run away of processor

Country Status (1)

Country Link
JP (1) JPS6252646A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5638644A (en) * 1979-09-05 1981-04-13 Hitachi Ltd Program control unit
JPS6083148A (en) * 1983-10-13 1985-05-11 Koito Mfg Co Ltd Detecting method of program runaway

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5638644A (en) * 1979-09-05 1981-04-13 Hitachi Ltd Program control unit
JPS6083148A (en) * 1983-10-13 1985-05-11 Koito Mfg Co Ltd Detecting method of program runaway

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