JPS6251878A - Comb line filter - Google Patents
Comb line filterInfo
- Publication number
- JPS6251878A JPS6251878A JP60192513A JP19251385A JPS6251878A JP S6251878 A JPS6251878 A JP S6251878A JP 60192513 A JP60192513 A JP 60192513A JP 19251385 A JP19251385 A JP 19251385A JP S6251878 A JPS6251878 A JP S6251878A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- output
- circuit
- input
- pass filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明はくし形フィルタに関し、とくに映像信号の信
号対雑音(S/N)比改善等に用いられる循環型くし形
フィルタの構成に関するものである。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a comb filter, and particularly relates to the configuration of a circulating comb filter used for improving the signal-to-noise (S/N) ratio of video signals. .
循環型くし形フィルタは映像信号のS/N比改善等に用
いられている。−例として第2図に昭和4年4月NHK
技研月報ゝ1くし形フィルターによる映像信号のプロセ
艮と画質“に記載された循環型くし形フィルタを示し、
8/N比改善動作について説明する。第2図において、
(1)は映像信号入力端子、(2)は加算回路、(3)
は1水平時間(以下の説明では1Hと略記する。)遅延
回路、(3a)は遅延部、(3b)はローパスフィルタ
、(4)は加算回路、(5)は系数器、(6)は信号出
力端子、(7)は信号量正規化回路、(8)は正規化信
号出力端子である0
次に動作について説明する0今、映像信号入力端子(1
)の信号をV、、IH遅延回路(3)の入力信号をvH
9信号出力端子(6)の信号をvoとし、系数器(5)
の帰還系数をに、IH遅延回路(3)の伝達関数をGと
すれば、(1〕? (2)式が成立する。Circulating comb filters are used to improve the S/N ratio of video signals. -As an example, Figure 2 shows NHK in April 1920.
A circulating comb filter described in Giken Monthly Report ``1 Video signal processing and image quality using a comb filter'' is shown.
The 8/N ratio improvement operation will be explained. In Figure 2,
(1) is a video signal input terminal, (2) is an addition circuit, (3)
is one horizontal time (abbreviated as 1H in the following explanation) delay circuit, (3a) is a delay section, (3b) is a low-pass filter, (4) is an adder circuit, (5) is a multiplier, and (6) is a The signal output terminal (7) is the signal amount normalization circuit, and (8) is the normalized signal output terminal.Next, the operation will be explained.0Now, the video signal input terminal (1)
) is V, and the input signal of IH delay circuit (3) is VH.
9 The signal of the signal output terminal (6) is set to vo, and the multiplier (5)
If the feedback system is , and the transfer function of the IH delay circuit (3) is G, then equation (1)?(2) holds true.
V=V+KV ・・・・〔1〕 ilI O 力信号viとの関係は、〔3〕式となる。V=V+KV ・・・[1] ilI O The relationship with the force signal vi is expressed by equation [3].
1+G
V = −V、・・・・〔3〕
0l−KO’
1+c)
〔3〕式の□が第2図のフィルタの伝達量1=KG
数であj5.1H遅延回路(3)の伝達関数Gはライン
相関の大きいテレビ信号を扱う場合、fL = 1.
(fLはライン周波数)とすればよく、G== e−j
O)r (、=coaωτ、−jθ1nωτ、と表わさ
れる。したがって、〔3〕式の伝達関数は〔4〕式のよ
うに表わすことが出来る。1+G V = -V, ... [3] 0l-KO' 1+c) □ in the formula [3] is the transmission amount of the filter in Figure 2, 1 = KG, and is the transmission of the 5.1H delay circuit (3). When the function G handles a television signal with a large line correlation, fL = 1.
(fL is the line frequency), G== e−j
O) r (,=coaωτ, -jθ1nωτ,) Therefore, the transfer function of equation [3] can be expressed as equation [4].
nを正の整数とすると、〔4〕式はf=nfLのとき2
図のフィルタがライン周波数の整数倍の所に腹部ができ
るくし形フィルタであり、帰還率Kを変えることによっ
て、フィルタの振幅周波数特性の尖鋭さが変わるので、
SlN比改善度が自由に設定できることを表わしている
。If n is a positive integer, then formula [4] becomes 2 when f=nfL.
The filter shown in the figure is a comb-shaped filter that has abdomens at integral multiples of the line frequency, and by changing the feedback rate K, the sharpness of the amplitude frequency characteristic of the filter changes.
This indicates that the degree of improvement in the SIN ratio can be set freely.
この時、1H遅延回路(3)は、遅延部(3a)と遅延
部(3a)の不要信号(サンプリングパルスもれ等)を
除去するローパスフィルタ(3b)とで構成され、遅延
部(3a)とローパスフィルタ(3t+)との遅延時間
の和が1Hとなるように設定されている。At this time, the 1H delay circuit (3) is composed of a delay section (3a) and a low-pass filter (3b) that removes unnecessary signals (sampling pulse leakage, etc.) from the delay section (3a). and the low-pass filter (3t+) are set so that the sum of the delay times is 1H.
又、信号量正規化回路(7)は信号出力端子(6)の信
号v0.がKの関数となるので、信号V。を(1−K)
倍することで、正規化信号出力端子(8)に、Xの変化
によシ出力振幅変化を伴なわない信号を出力する為に設
けられている。Further, the signal amount normalization circuit (7) receives the signal v0. of the signal output terminal (6). is a function of K, so the signal V. (1-K)
By multiplying, the normalized signal output terminal (8) is provided to output a signal that does not cause an output amplitude change due to a change in X.
従来の回路の場合、SZN比改善度を変化させるために
、系数器の系数Kを変化させると信号量正規化回路の乗
数もKIC比例させて変化させなければならず、両回路
の整合性を得るのが難かしく、実質的にXを可変するこ
とは困難であった。また、ライン相関のない映像信号が
入力された場合、にせ信号が発生するといった点や、水
平周波数帯域を制限するには、遅延回路用ローパスフィ
ルタの他に、もう一つローパスフィルタが必要となシ、
不経済的であるといった問題点があった。In the case of conventional circuits, in order to change the SZN ratio improvement degree, when the coefficient K of the multiplier is changed, the multiplier of the signal amount normalization circuit must also be changed in proportion to KIC, which makes it difficult to maintain the consistency of both circuits. It was difficult to obtain, and it was difficult to substantially vary X. Additionally, if a video signal with no line correlation is input, a false signal may be generated, and in order to limit the horizontal frequency band, another low-pass filter is required in addition to the low-pass filter for the delay circuit. C,
There was a problem that it was uneconomical.
この発明は上記のような問題点を解消するためになされ
たもので、系数器の系数Kを容易に変化させることが出
来、又、にせ信号が発生せず、水平周波数帯域制限用ロ
ーパスフィルタと、遅延回路用ローパスフィルタとが1
個のローパスフィルタで兼用できる循環型くし形フィル
タ回路を提供することを目的とする。This invention was made in order to solve the above-mentioned problems, and it is possible to easily change the coefficient K of the coefficient generator, and it does not generate false signals, and it can be used as a low-pass filter for horizontal frequency band limitation. , low-pass filter for delay circuit and 1
The present invention aims to provide a circulating comb filter circuit that can be used in combination with two low-pass filters.
この発明に係る循環型<、シ形フィルタは、循環遅延信
号入力を系数出力から取り、循環ループ内にローパスフ
ィルタを設け、更に、その循環ループ内にキラー回路を
設けたものである。The cyclic filter according to the present invention takes the cyclic delay signal input from the system output, provides a low-pass filter in the cyclic loop, and further provides a killer circuit in the cyclic loop.
この発明においては、系数器出力から循環遅延信号入力
を取るようにしたので信号量正規化回路は不要となり、
系数器の系数Kを変化させるのみで、希望のS/N比改
善度を信号量変化を伴なわずに得られる。また、循環ル
ープ内にローパスフィルタを設けたので、水平周波数帯
域制限用のローパスフィルタと遅延回路用ローパスフィ
ルタトラ兼用させることができる。そして更に、ライン
相関のない場合はキラー回路によって信号の循環ループ
を遮断して、にせ信号の発生を抑圧できる。In this invention, since the cyclic delay signal input is taken from the coefficient output, a signal amount normalization circuit is not required.
By simply changing the coefficient K of the coefficient multiplier, the desired S/N ratio improvement can be obtained without changing the signal amount. Further, since a low-pass filter is provided in the circulation loop, it can be used both as a low-pass filter for horizontal frequency band limitation and as a low-pass filter for a delay circuit. Furthermore, if there is no line correlation, the signal circulation loop can be cut off by the killer circuit to suppress the generation of false signals.
第1図はこの発明の一実施例を示すブロック構成図であ
る。第1図において、(1)は映像信号入力端子、(2
)は加算回路、(3a)は遅延部、(3b)はローパス
フィルタ、(5)は系数器、(9)はキラー回路、(1
1は減算回路、(ロ)は信号出力端子である。なお第1
図中、第2図の従来例と同等部分には同一符号を用いて
いる。FIG. 1 is a block diagram showing an embodiment of the present invention. In Figure 1, (1) is a video signal input terminal, (2
) is an adder circuit, (3a) is a delay section, (3b) is a low-pass filter, (5) is a multiplier, (9) is a killer circuit, (1
1 is a subtraction circuit, and (b) is a signal output terminal. Note that the first
In the figure, the same reference numerals are used for parts equivalent to those of the conventional example shown in FIG.
次に動作について説明する。今、ライン相関のある映像
信号が入力されている場合、キラー回路(9)はバッフ
ァとして、信号に何ら影響を及ぼさない。この時、映像
信号入力端子(1)の信号をvI、加算回路(2)の出
力信号を■1.系数器(5)の出力信号をv2.信号出
力端子(ロ)の出力をV。、ローパスフィルタ(3b)
の伝達関数を01.遅延部(3a)の伝達関数を02と
すると、下記式(5) 、(6)が成立する。Next, the operation will be explained. If a video signal with line correlation is being input now, the killer circuit (9) acts as a buffer and does not affect the signal in any way. At this time, the signal of the video signal input terminal (1) is set to vI, and the output signal of the adder circuit (2) is set to 1. The output signal of the system multiplier (5) is converted to v2. The output of the signal output terminal (b) is set to V. , low-pass filter (3b)
The transfer function of 01. If the transfer function of the delay section (3a) is 02, the following equations (5) and (6) hold true.
■o= C)1v1−v2= GlVl−KG1V1=
(1−K )Glvl・・・・〔5〕
V =V +() V =V +KGGV ・−(6
)(”5) 、 (6’:]式から■1を消去すると、
入出力の関係には〔7a式が成立する。■o= C)1v1-v2= GlVl-KG1V1=
(1-K) Glvl... [5] V = V + () V = V +KGGV ・-(6
)(”5), (6':] If you delete ■1 from the expression,
Formula 7a holds true for the input/output relationship.
今、ローパスフィルタ(3b)と、遅延部(3a)との
遅延時間をそれぞれτ1.τ2として、τ1とτ2との
和がIHとなるように設定すると、〔7〕式分母の01
G2は次のように表わされる。Now, the delay time of the low-pass filter (3b) and the delay unit (3a) is τ1. If τ2 is set so that the sum of τ1 and τ2 is IH, 01 in the denominator of formula [7]
G2 is expressed as follows.
()()=。−jωτ1.。−Jωτ2=o−jω(τ
1+τ2 ) = 、−jωτ1+==()したがって
〔マ〕式は〔8a式となる。()()=. −jωτ1. . −Jωτ2=o−jω(τ
1+τ2) = , -jωτ1+==() Therefore, formula [Ma] becomes formula [8a].
−K
。 l−K。 1 、・・・・〔8〕
には1+に−・G1となシ、これは第2図のフィルタと
同じくライン周波数の整数倍の所に腹部が、奇数倍の所
にくし部が出来るくし形フィルタである事を示している
。今、ライン周波数の整数倍の成分に着目すると、帰還
系数Kを変化させても、信号振幅は変化しないので、正
規化回路は不要となシ、にを変化させて、S/N比改善
度を自由に設定できる。また、〔8a式の01はローパ
スフィルタ(3b)の伝達関数であり、このローパスフ
ィルタ(3’b)ti%遅延部(3a)の不要信号を除
去すると共に、フィルタ全体の水平周波数帯域制限を行
なっていることかわかる。-K. l-K. 1,...[8] has 1+ and -G1, and this is a comb that has an abdomen at an integral multiple of the line frequency and a comb section at an odd multiple, just like the filter in Figure 2. This indicates that it is a shaped filter. Now, if we focus on components that are integral multiples of the line frequency, the signal amplitude will not change even if the feedback coefficient K is changed, so a normalization circuit is not necessary. can be set freely. [01 in formula 8a is the transfer function of the low-pass filter (3b), which removes unnecessary signals from the low-pass filter (3'b) ti% delay section (3a) and limits the horizontal frequency band of the entire filter. I understand what you are doing.
次にライン相関がない映像信号が入力された場合につい
て考える。この時には、前記〔5〕〜〔8a式は成りた
たず、にせ信号が発生する。したがってライン相関がな
い場合はキラー回路(9)によって、回路を遮断し、信
号入力端子(1)から入力された信号を、信号出力端子
(ロ)に出力しないようKすれば、にせ信号は発生しな
い。Next, consider the case where a video signal without line correlation is input. At this time, the above formulas [5] to [8a] do not hold, and a false signal is generated. Therefore, if there is no line correlation, the killer circuit (9) can be used to shut off the circuit and prevent the signal input from the signal input terminal (1) from being output to the signal output terminal (b), thereby generating a false signal. do not.
なお、上記実施例ではキラー回路(9)をローパスフィ
ルタ(3b)の出力側に設けたが、これはローパスフィ
ルタ(31))の入力側であってもよく、上記実施例と
同様の効果を奏する。In the above embodiment, the killer circuit (9) was provided on the output side of the low-pass filter (3b), but it may also be provided on the input side of the low-pass filter (31), and the same effect as in the above embodiment can be obtained. play.
以上のように、この発明によるくし形フィルタでは、S
/N比改善度を決定する帰還系数にの値を信号量正規化
回路なしに自由に設定出来、又、従来2つ必要であった
ローパスフィルタを1つで兼用することが出来、かつ、
にせ信号の発生を抑圧することが出来るといった効果が
ある。As described above, in the comb filter according to the present invention, S
The value of the feedback system that determines the degree of improvement in the /N ratio can be freely set without the need for a signal amount normalization circuit, and one low-pass filter, which conventionally required two, can be used.
This has the effect of suppressing the generation of false signals.
第1図はこの発明の一実施例によるくし形フィルタを示
すブロック構成図、第2図は従来のくし形フィルタを示
すブロック構成図である。
図において、(1)は映像信号入力端子、(2)は加算
回路、(3a)は遅延部、(3b)はローパスフィルタ
、(5)は系数器、(9)はキラー回路、翰は減算回路
、(ロ)は信号出力端子である。
なお、図中、同一符号は同−又は相当部分を示す。FIG. 1 is a block diagram showing a comb filter according to an embodiment of the present invention, and FIG. 2 is a block diagram showing a conventional comb filter. In the figure, (1) is the video signal input terminal, (2) is the addition circuit, (3a) is the delay section, (3b) is the low-pass filter, (5) is the multiplier, (9) is the killer circuit, and the wire is the subtraction circuit. In the circuit, (b) is a signal output terminal. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
Claims (4)
回路、互いに直列に接続され上記加算回路の出力が入力
されるローパスフィルタとキラー回路との直列接続体、
この直列接続体の出力が入力される系数器、この系数器
の出力が入力され出力が上記加算回路の第2の入力端子
に供給される遅延部、及び上記直列接続体の出力が被減
算信号入力端子に、上記系数器の出力が減算信号入力端
子に入力される減算回路を備え、上記ローパスフィルタ
と上記遅延部との遅延時間の和が1水平時間であるよう
にし、上記減算回路の出力端子から出力信号を得るよう
にしたくし形フィルタ。(1) an adder circuit to which a video input signal is input to a first input terminal; a series connection body of a low-pass filter and a killer circuit that are connected in series with each other and to which the output of the adder circuit is input;
A series unit to which the output of the series connection unit is input; a delay unit to which the output of the series unit is input and the output is supplied to the second input terminal of the adding circuit; and the output of the series connection unit is the signal to be subtracted. The input terminal is provided with a subtraction circuit in which the output of the multiplier is input to the subtraction signal input terminal, and the sum of the delay times of the low-pass filter and the delay section is one horizontal time, and the output of the subtraction circuit is A comb filter that obtains the output signal from the terminal.
を接続したことを特徴とする特許請求の範囲第1項記載
のくし形フィルタ。(2) The comb filter according to claim 1, wherein the series connection body has a killer circuit connected after the low-pass filter.
を接続したことを特徴とする特許請求の範囲第1項記載
のくし形フィルタ。(3) The comb filter according to claim 1, wherein the series connection body includes a low-pass filter connected after the killer circuit.
したことを特徴とする特許請求の範囲第1項ないし第3
項のいずれかに記載のくし形フィルタ。(4) Claims 1 to 3, characterized in that the coefficient of the coefficient generator can be arbitrarily set from the outside.
A comb filter according to any of paragraphs.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60192513A JPH0669216B2 (en) | 1985-08-30 | 1985-08-30 | Comb filter |
US06/852,207 US4684976A (en) | 1985-04-18 | 1986-04-15 | Feedback comb-type filter |
GB8609529A GB2175166B (en) | 1985-04-18 | 1986-04-18 | Feedback comb-type filter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60192513A JPH0669216B2 (en) | 1985-08-30 | 1985-08-30 | Comb filter |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6251878A true JPS6251878A (en) | 1987-03-06 |
JPH0669216B2 JPH0669216B2 (en) | 1994-08-31 |
Family
ID=16292532
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60192513A Expired - Fee Related JPH0669216B2 (en) | 1985-04-18 | 1985-08-30 | Comb filter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0669216B2 (en) |
-
1985
- 1985-08-30 JP JP60192513A patent/JPH0669216B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH0669216B2 (en) | 1994-08-31 |
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