JPS6249647A - Manufacture of resin-molded semiconductor device - Google Patents

Manufacture of resin-molded semiconductor device

Info

Publication number
JPS6249647A
JPS6249647A JP18841086A JP18841086A JPS6249647A JP S6249647 A JPS6249647 A JP S6249647A JP 18841086 A JP18841086 A JP 18841086A JP 18841086 A JP18841086 A JP 18841086A JP S6249647 A JPS6249647 A JP S6249647A
Authority
JP
Japan
Prior art keywords
lead frame
slit
resin
lead
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18841086A
Other languages
Japanese (ja)
Inventor
Hideo Inayoshi
秀夫 稲吉
Yoshiaki Wakashima
若島 喜昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP18841086A priority Critical patent/JPS6249647A/en
Publication of JPS6249647A publication Critical patent/JPS6249647A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PURPOSE:To reduce the warpage and the distortion of a package generating when a resin molding is performed by a method wherein a slit is provided in the longitudinal direction of a frame body on the lead frame on which a lead part is coupled to each other and a coupled frame body is provided. CONSTITUTION:A slit 8 is provided on a frame body part 7 having a plurality of leads 1 arranged on a semiconductor pellet connecting tab 1 and on the circumference of the tab, and at the same time, a slit 8 is provided on both side face parts 5. Also, a slit 6 provided on the both side face parts 5 absorb the distortion generated in the width direction of the lead frame. As a result, the warpage of a package can be prevented. The slit 8 provided on the frame body part 7 of the lead frame absorbs the distortion generating in the longitudinal direction of the lead frame. Consequently, the lead frame contracts in longitudinal direction by the contractile force of resin and the warpage of the entire lead frame in longitudinal direction can be prevented.

Description

【発明の詳細な説明】 するものである。[Detailed description of the invention] It is something to do.

レジンモールド型IC(半導体集積回路装置)は、複数
個のICに必要とするリードを一体に形成したリードフ
レームを用意し、そのリードフレームの各タブ部に半導
体ペレットを接続し、リードとペレットの電極をコネク
タ線を介して接続し、次いでレジンモールドし、その後
、リードフレームの不要部を切断除去する方法により製
造される。
Resin-molded ICs (semiconductor integrated circuit devices) are manufactured by preparing a lead frame in which the leads necessary for multiple ICs are integrally formed, and connecting semiconductor pellets to each tab of the lead frame. It is manufactured by connecting electrodes via connector wires, then resin molding, and then cutting and removing unnecessary parts of the lead frame.

従来において用いられたリードフレームの一例は第2図
に示される。
An example of a conventionally used lead frame is shown in FIG.

このようなリードフレームを用いてICを製造した場合
、次のような問題があった。
When an IC is manufactured using such a lead frame, the following problems occur.

レジンモールド直後の高い温度の状態から常温に冷却さ
れる間にリードフレームとレジンの熱膨張係数の不一致
(レジンの方が熱膨張係数が大きい)に基づきリードフ
レームの各モールド部でレジンの収縮力によってリード
が収縮する現象が生じ、それに起因してリードフレーム
に歪み,反りが発生し、しばしばレジンがリードフレー
ムから剥離するという問題があった。
While the resin mold is being cooled from a high temperature state to room temperature, the shrinkage force of the resin is applied to each mold part of the lead frame due to the mismatch in thermal expansion coefficient between the lead frame and the resin (the resin has a larger coefficient of thermal expansion). This causes a phenomenon in which the leads shrink, which causes distortion and warpage in the lead frame, resulting in the problem that the resin often peels off from the lead frame.

本発明はレジンモールドに際してのパッケージの反り,
歪みを少なくすることを目的とするものである。
The present invention prevents package warpage during resin molding.
The purpose is to reduce distortion.

このような目的を達成するために、本発明によれば、互
いに平行に延在する一対の第1の枠体部と、該一対の枠
体部間に連結されて互いに平行に延在する複数の第2の
枠体部とを有し、かつ、隣接する一対の前記第2の枠体
部と前記第1の枠体部の一部とによって区画された各領
域内において半導体ペレット接続用タブおよび該タブ周
辺罠配設された複数のリードを有するリードフレームに
おいて、前記領域を区画している前記一対の第1の枠体
部の一部にスリットを形成してなるものである。
In order to achieve such an object, the present invention includes a pair of first frame portions extending parallel to each other, and a plurality of first frame portions connected between the pair of frame portions and extending parallel to each other. and a semiconductor pellet connecting tab in each region partitioned by a pair of adjacent second frame parts and a part of the first frame part. In the lead frame having a plurality of leads arranged around the tab, a slit is formed in a part of the pair of first frame portions that partition the area.

以下本発明を図示した実施例により説明する。The present invention will be explained below with reference to illustrated embodiments.

第1図は本発明の一実施例を示す。FIG. 1 shows an embodiment of the invention.

1は半導体ペレット接続用タブの周囲にビーム状に配列
されたリード、2は半導体ペレット接続用タブ、3はタ
ブ2を保持するだめのタブリード、これらリード1、タ
ブ2及びタブリード3を含めてリード部と称する。4は
レジンモールドの際モールド部からレジンが流出するの
を防止するためのタイバー、5は長手方向の両側面部、
6はその側面部に形成されたスリット、7は相隣接する
リード部相互間を仕切る枠体である。
1 is a lead arranged in a beam shape around a tab for connecting a semiconductor pellet, 2 is a tab for connecting a semiconductor pellet, 3 is a tab lead for holding tab 2, and leads including lead 1, tab 2, and tab lead 3 It is called a department. 4 is a tie bar for preventing resin from flowing out from the mold part during resin molding, 5 is a longitudinal side part,
Reference numeral 6 represents a slit formed in the side surface thereof, and reference numeral 7 represents a frame that partitions adjacent lead portions.

この枠体7はリードフレームの剛性を保つ等のために必
要なもので、これがないとリードの先端部が弱くなり、
製造工程中に折れたりするので設けられている。そして
、この枠体7には幅0,1〜0.6鰭のスリットが設け
られている。
This frame 7 is necessary to maintain the rigidity of the lead frame, and without it, the tip of the lead will become weak.
This is provided because it can break during the manufacturing process. This frame body 7 is provided with a slit having a width of 0.1 to 0.6 fins.

スリットを設けた理由は前述の如(、リードフレームの
各モールド部にSいてレジンの収縮力によってリードが
収縮する現象が生じ、それに起因してリードフレームに
歪が生じるので、スリットによりてリードフレーム自体
の剛性を弱め、その歪を吸収できるようにするためであ
る。
The reason for providing the slits is as mentioned above (a phenomenon occurs in which the leads shrink due to the shrinkage force of the resin in each mold part of the lead frame, and this causes distortion in the lead frame. This is to weaken its own rigidity so that it can absorb the strain.

すなわち、リードフレームの枠体部7に設けたスリット
8は、リードフレームの長手方向に生ずる歪を吸収する
。これによって、レジンの収縮力によってリードフレー
ムが長手方向に収縮してリードフレーム全体が長手方向
に反ることを防止できる。これはICの信頼性や製造上
の作業性の向上に寄与する。
That is, the slit 8 provided in the frame portion 7 of the lead frame absorbs strain occurring in the longitudinal direction of the lead frame. This prevents the lead frame from shrinking in the longitudinal direction due to the shrinkage force of the resin and warping the entire lead frame in the longitudinal direction. This contributes to improving IC reliability and manufacturing workability.

また、両側面部5に設けたスリット6は、リードフレー
ムの幅員方向に生ずる歪を吸収する。これによって、パ
ッケージの反りを防止できる。
Furthermore, the slits 6 provided on both side surfaces 5 absorb distortion occurring in the width direction of the lead frame. This prevents the package from warping.

なお、スリット6を設ける代りに、例えば側面部5の少
なくとも一部の幅員を減少させることによって、パッケ
ージの反り、歪を少な(させることができるが、この場
合は、リードフレーム全体の機械的強度が著るしく低下
する。また、レジンモールド時のレジンの収縮にかかわ
らずK、リードフレーム全体を良好な形状に維持せしめ
ることが困難となってくる。スリット6の場合、リード
フレームの機械的強度を良好なレベルに維持せしめるこ
とができる。また、側面部5においてスリット6よりも
外側に有る部分が実質的に形状維持部として作用するこ
ととなるので、レジンモールド時のレジンの収縮にかか
わらずに、リードフレーム全体を良好な平面形状に維持
できる。これによって、モールド以後の切断等の工程な
どにおける作業性も良好に維持できる。
Note that instead of providing the slit 6, for example, by reducing the width of at least a portion of the side surface portion 5, the warping and distortion of the package can be reduced, but in this case, the mechanical strength of the entire lead frame In addition, it becomes difficult to maintain the entire lead frame in a good shape despite the contraction of the resin during resin molding.In the case of slit 6, the mechanical strength of the lead frame decreases significantly. In addition, since the portion of the side surface portion 5 located outside the slit 6 substantially acts as a shape-maintaining portion, regardless of the shrinkage of the resin during resin molding. In addition, the entire lead frame can be maintained in a good planar shape.Thereby, workability in processes such as cutting after molding can also be maintained well.

以上説明したように、本発明によれば、レジンモールド
に際してのパッケージの反り、歪みヲ少な(することが
できるものである。
As explained above, according to the present invention, the warpage and distortion of the package during resin molding can be reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例に用いるリードフレームの平面
図である。 第2図は従来例を示すリードフレームの平面図である。 1・・・リード、2・・・タブ、3・・・タブリード、
4・・・タイバー、5・・・側面部、6・・・スリット
、7・・・枠体部、8・・・スリット。
FIG. 1 is a plan view of a lead frame used in an embodiment of the present invention. FIG. 2 is a plan view of a lead frame showing a conventional example. 1...Lead, 2...Tab, 3...Tab lead,
4... Tie bar, 5... Side part, 6... Slit, 7... Frame part, 8... Slit.

Claims (1)

【特許請求の範囲】[Claims] 1、レジンモールドされるべき区域に延長するリード部
がそれぞれ連結されているとともに、それぞれの長手方
向にその長手方向に沿うスリットが設けられかつ上記区
域を囲むように互いに連結された第1ないし第4枠体と
、上記リード部とを備えたリードフレームを準備し、上
記区域をレジンによりモールドすることを特徴とするレ
ジン封止半導体装置の製法。
1. Lead parts extending to the area to be resin molded are connected to each other, and a slit is provided along the longitudinal direction of each lead part, and the first to second lead parts are connected to each other so as to surround the area. A method for manufacturing a resin-sealed semiconductor device, comprising preparing a lead frame having four frame members and the lead portion, and molding the area with resin.
JP18841086A 1986-08-13 1986-08-13 Manufacture of resin-molded semiconductor device Pending JPS6249647A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18841086A JPS6249647A (en) 1986-08-13 1986-08-13 Manufacture of resin-molded semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18841086A JPS6249647A (en) 1986-08-13 1986-08-13 Manufacture of resin-molded semiconductor device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP1606883A Division JPS6035828B2 (en) 1983-02-04 1983-02-04 Manufacturing method for resin-encapsulated integrated circuit device

Publications (1)

Publication Number Publication Date
JPS6249647A true JPS6249647A (en) 1987-03-04

Family

ID=16223165

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18841086A Pending JPS6249647A (en) 1986-08-13 1986-08-13 Manufacture of resin-molded semiconductor device

Country Status (1)

Country Link
JP (1) JPS6249647A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3665256A (en) * 1968-10-15 1972-05-23 Rca Corp Heat dissipation for power integrated circuits
JPS4936777A (en) * 1972-08-10 1974-04-05

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3665256A (en) * 1968-10-15 1972-05-23 Rca Corp Heat dissipation for power integrated circuits
JPS4936777A (en) * 1972-08-10 1974-04-05

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