JPS6243199A - Manufacture of printed wiring board - Google Patents

Manufacture of printed wiring board

Info

Publication number
JPS6243199A
JPS6243199A JP18355185A JP18355185A JPS6243199A JP S6243199 A JPS6243199 A JP S6243199A JP 18355185 A JP18355185 A JP 18355185A JP 18355185 A JP18355185 A JP 18355185A JP S6243199 A JPS6243199 A JP S6243199A
Authority
JP
Japan
Prior art keywords
land
hole
conductive
printed wiring
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18355185A
Other languages
Japanese (ja)
Inventor
英夫 町田
川上 伸
春山 哲
裕 吉野
弘孝 小此木
井沢 信一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NIPPON SHII M K KK
Original Assignee
NIPPON SHII M K KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NIPPON SHII M K KK filed Critical NIPPON SHII M K KK
Priority to JP18355185A priority Critical patent/JPS6243199A/en
Publication of JPS6243199A publication Critical patent/JPS6243199A/en
Pending legal-status Critical Current

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 1産業上の利用分野1 本発明はプリント配線板の製造方法に関する。[Detailed description of the invention] 1 Industrial application field 1 The present invention relates to a method for manufacturing a printed wiring board.

[従来の技術1 従来、絶縁基板の両面に形成された回路パターンを接続
する方法として、両面の回路パターンにおけるランドの
中心部に、両面に貫通する導通孔を設けるとともにこの
導通孔中に導電物質を充填することにより、当該導電物
質を介して接続する方法が特公昭56−15158号公
報に記載されて公知である。
[Prior art 1] Conventionally, as a method for connecting circuit patterns formed on both sides of an insulating substrate, a conductive hole that penetrates both sides is provided at the center of a land in the circuit pattern on both sides, and a conductive material is placed in the conductive hole. A well-known method is described in Japanese Patent Publication No. Sho 56-15158, in which connection is made through the conductive material by filling the conductive material.

I発明が解決しようとする問題点l しかして、前記特公昭56−15158号公報所載の方
法によれば第6図に示す如く片面または両面にパターン
1.2を形成した絶縁基板3の回路パターン面にランド
部4.5および両面導通孔を形成する周囲などを残して
ソルダーレジストの絶縁液WI6.7を設けた後、導通
孔8をドリル加工またはパンチング加工にて穿孔し、か
つ第7図に示す如くこの導通孔8中に導通ペイントより
なる導電物質9を充填し、両面の回路パターン1゜2を
接続するものである。
I Problems to be Solved by the Invention According to the method described in Japanese Patent Publication No. 56-15158, as shown in FIG. After applying the insulating liquid WI6.7 of solder resist to the pattern surface, leaving the land portion 4.5 and the surrounding areas where the double-sided conductive holes are to be formed, the conductive holes 8 are drilled or punched, and the seventh As shown in the figure, the conductive hole 8 is filled with a conductive substance 9 made of conductive paint, and the circuit patterns 1 and 2 on both sides are connected.

しかるに、ドリルまたはパンチング加工にて穿孔するこ
とにより形成された導通孔8はランド4.5を含む開口
縁4a 、5aが断面が略直角に穿孔されているために
、前記導電物質9を導通孔8中に充填する場合、従来こ
の充填方法としてはビン方式またはシルクスクリーン方
法が採用されているが、特にシルクスクリーン方式によ
る充填に困難性を有し導通孔8中に充填される導電物質
9の充填ムラを生じ、導通性旋の精度に問題点を有する
However, since the conductive hole 8 formed by drilling or punching has a substantially perpendicular cross section at the opening edges 4a and 5a including the land 4.5, the conductive material 9 is formed through the conductive hole. Conventionally, a bottle method or a silk screen method has been adopted as the filling method for filling the conductive material 9 into the conductive hole 8. It causes uneven filling and has problems with the accuracy of conduction rotation.

また、導通孔8中に導電物質9を充填して導通完了後、
このプリント配線10に電子部品(図示しない)を組み
込む際に、溶解した半田浴中に浸漬された場合、半田融
解浴温度が240〜260℃と高温のため、絶縁基板3
と導電物質9あるいはランド4,5との材質の差にもと
ず〈熱膨張の差によって、導通孔8中の導電物質9中、
特にランド4,5と絶縁基板3との境界に歪みによる亀
裂イが発生する。
Further, after filling the conductive material 9 into the conductive hole 8 and completing the conduction,
When electronic components (not shown) are incorporated into the printed wiring 10, if the insulating substrate 10 is immersed in a melted solder bath, the temperature of the solder melting bath is as high as 240-260°C.
Based on the difference in material between the conductive material 9 and the lands 4 and 5, the difference in thermal expansion causes the conductive material 9 in the conductive hole 8 to
In particular, cracks occur at the boundaries between the lands 4 and 5 and the insulating substrate 3 due to strain.

従って、前記両名の問題点の発生によりプリント配線板
10自体の信頼性が損なわれる大きな問題点を有してい
た。
Therefore, the reliability of the printed wiring board 10 itself is impaired due to the occurrence of both of the above-mentioned problems.

因って、本発明は、この種プリント配線板における問題
点に着目してなされたもので、導通孔中への導電物質の
充填ムラと半田浴中等における導電物質9の亀裂の発生
を防止し、信頼性に富むこの種プリント配線板の提供を
目的とするものである。
Therefore, the present invention has been made by focusing on the problems in this type of printed wiring board, and is intended to prevent uneven filling of the conductive material into the conductive holes and the occurrence of cracks in the conductive material 9 in a solder bath or the like. The purpose of this invention is to provide a highly reliable printed wiring board of this type.

[問題点を解決するための手段] 本発明のプリント配線板の製造方法は、絶縁基板の片面
または両面に所要の回路パターンを形成するに当り、当
該回路パターン中のランドのランド孔の径を予め当該ラ
ンドの中心に位置せしめて貫通する導通孔の径より大径
に形成する工程と前記回路パターン中のランドのランド
孔の中心に位置せしめて導通孔を貫通することにより、
前記回路パターン中のランドのランド孔の内周縁間に段
部を形成する工程と、前記導通孔に導電物質を充填する
工程とから成るプリント配線基板の製造方法。
[Means for Solving the Problems] In the method for manufacturing a printed wiring board of the present invention, when forming a desired circuit pattern on one or both sides of an insulating substrate, the diameter of the land hole of the land in the circuit pattern is adjusted. By positioning the land in advance at the center of the land and forming the land to have a diameter larger than the diameter of the conductive hole passing through it, and by positioning it at the center of the land hole of the land in the circuit pattern and passing through the conductive hole,
A method for manufacturing a printed wiring board, comprising the steps of: forming a step between the inner peripheral edges of the land hole of the land in the circuit pattern; and filling the conductive hole with a conductive material.

1 作用 J 本発明のプリント配線板の製造方法は導電物質の充填に
ちり、ランドのランド孔内周縁と導通孔の開口縁間に設
けた段部によって導電物質の導通孔中への充填の際の流
入を助長し、かつ導電物質に対する絶縁基板とランド間
に生ずる熱歪みの影響を前記段部により緩和し、導通孔
中に充填した導電物質における亀裂の発生を防止するも
のである。
1 Effect J The method for manufacturing a printed wiring board of the present invention includes dust particles when filling the conductive material into the conductive hole, and a stepped portion provided between the inner periphery of the land hole of the land and the opening edge of the conductive hole. The stepped portion facilitates the inflow of the conductive material and alleviates the effect of thermal strain occurring between the insulating substrate and the land on the conductive material, thereby preventing the occurrence of cracks in the conductive material filled in the conductive hole.

[実施例 ] 以下本発明のプリント配線板の製造方法の実施例を図面
とともに説[J]する。
[Example] Hereinafter, an example of the method for manufacturing a printed wiring board of the present invention will be described [J] with reference to the drawings.

:51図は本発明の製造方法により製造するプリント配
線板を示す部分拡大平面図、第2図は第1図A−A線断
面図、第3図は導通孔中に充填物質を充填した状態の断
面図である。
: Figure 51 is a partially enlarged plan view showing a printed wiring board manufactured by the manufacturing method of the present invention, Figure 2 is a cross-sectional view taken along the line A-A in Figure 1, and Figure 3 is a state in which the through hole is filled with a filler material. FIG.

而して図中20は絶縁基板でこの絶縁基板20の両面2
0a、20bにはそれぞれ所要の回路パターン21.2
2を形成しである。尚、回路パターン21.22につい
ては図中それぞれの回路パターン21.22におけるラ
ンド23゜24のみを拡大して示しである。
20 in the figure is an insulating substrate, and both sides 2 of this insulating substrate 20 are
0a and 20b each have the required circuit pattern 21.2.
2 is formed. Regarding the circuit patterns 21 and 22, only the lands 23 and 24 in each of the circuit patterns 21 and 22 are shown enlarged in the figure.

また、両面20a、20bのそれぞれの回路パターン2
1.22相互を電気的に接続するため、対応するランド
23.24のランド孔25゜26の中心部に位置せしめ
て導通孔27を貫通せしめである。
In addition, each circuit pattern 2 on both sides 20a and 20b
1.22 In order to electrically connect each other, the land holes 25 and 26 of the corresponding lands 23 and 24 are positioned at the center of the land holes 25 and 26, and the conductive holes 27 are passed through them.

さらに、前記ランド23.24にランド孔25.26を
設けるとともにその中心部に導通孔27を貫通する場合
には、特に、ランド孔25゜26の径!;L1を導通孔
27の経文、より大径とすることによってランド23.
24の内周縁23a、24aと導通孔27の開口縁27
a。
Furthermore, when the lands 23, 24 are provided with land holes 25, 26 and the conductive holes 27 are passed through the centers thereof, the diameters of the land holes 25, 26, in particular! ; By making L1 a larger diameter than the sutra of the conduction hole 27, the land 23.
24 and the opening edge 27 of the conduction hole 27.
a.

27b間に段部28.29奢設けである。A stepped portion 28 and 29 is provided between 27b and 27b.

かかる構成から成るプリント配線板30における両面の
回路を導通する場合には、第3図に示す如く導電ペイン
トから成る導電物質31を導通孔27中に充填すること
によりランド23.24を導電物質31を介して電気的
に接続するものである。
In order to conduct the circuits on both sides of the printed wiring board 30 having such a structure, the conductive material 31 made of conductive paint is filled into the conductive holes 27 as shown in FIG. It is electrically connected via.

尚、図中32はソルダレジストの絶縁被膜を示し、かつ
図示していないが導電物質31のついてはエポキシ樹脂
等のオーバーコートを施こして絶縁外装するものである
In the figure, reference numeral 32 indicates an insulating coating of solder resist, and although not shown, the conductive material 31 is overcoated with epoxy resin or the like to provide an insulating exterior.

第4図a−fは本発明プリント配線板の製造方法の実施
例を示す工程図である。
FIGS. 4a to 4f are process diagrams showing an embodiment of the method for manufacturing a printed wiring board of the present invention.

以下には第4図a−fの工程に従うプリント配線板30
の製造方法について説明する。
Below is a printed wiring board 30 according to the steps shown in FIG. 4 a-f.
The manufacturing method will be explained.

40は絶縁基板41の両面に銅箔42.43を調節した
両面銅張積層板(第4図a)である。
40 is a double-sided copper-clad laminate (FIG. 4a) in which copper foils 42 and 43 are arranged on both sides of an insulating substrate 41.

しかる後、第4図すに示す如く、銅張積層板40の銅箔
42.43に回路パターンに対応するパターンレジスト
の]1lQ45,46を施すとともに第4図Cに示す如
くこれにエツチング加工を施して絶縁基板41の両面に
回路を形成する。
Thereafter, as shown in FIG. 4, a pattern resist 45, 46 corresponding to the circuit pattern is applied to the copper foils 42 and 43 of the copper-clad laminate 40, and etching is performed thereon as shown in FIG. 4C. Then, circuits are formed on both sides of the insulating substrate 41.

第4図す、cについては特に両面回路パターン中ランド
47.48を形成する場合についてのみ示すものである
Figures 4 and 4c show only the case where lands 47 and 48 are formed in the double-sided circuit pattern.

そして、第4図すに示した塗膜45.46パターン印刷
状態下においてエツチング加工を施す場合、特に、第4
図Cに示す如く、エツチング後に成形されたランド47
.48のランド孔49゜50の経文、は後工程にてラン
)”47.48のランド孔49.50の中心に貫通する
導通孔44の経文、より大径となるようにエツチングレ
ジスト塗膜45.46を施すものである。しかして、こ
れをエツチングすることにより第4図Cに示すランド4
7.48を形成した後第4図dに示す如く、ランド孔4
9.50の中心に位こせしめて導通孔44(経文、)を
パンチング加工あるいはドリル加工にて貫通することに
よりランド47゜44のランド孔49.50の内周縁と
導通孔44の開口縁間に段部51,52を形成すること
ができる。
When etching is performed under the condition of printing the coating film 45 and 46 patterns shown in Fig. 4, especially the fourth
As shown in Figure C, the land 47 formed after etching
.. The etching resist coating 45 is applied to the land hole 49 of 48 and the passage of the conductive hole 44 that penetrates through the center of the land hole 49.50 in the subsequent process. .46.By etching this, land 4 shown in Fig. 4C is formed.
7. After forming the land hole 4, as shown in Fig. 4d,
9.50 and pass through the through hole 44 (Kyobun) by punching or drilling, thereby creating a gap between the inner peripheral edge of the land hole 49.50 of the land 47 and the opening edge of the through hole 44. Step portions 51 and 52 can be formed in the steps.

その後、ランド47.48の導通部を残してソルダレジ
ストの絶縁被膜53.54を施す(第4図e)とともに
導通孔44中に導電物質55を充填することによりラン
ド47.48を同導電物賀55を介して導通せしめるこ
とにより、プリント配線板60を形成することができる
Thereafter, an insulating coating 53.54 of solder resist is applied to the lands 47.48, leaving the conductive portions (FIG. 4e), and the conductive holes 44 are filled with a conductive material 55, thereby forming the lands 47.48 with the same conductive material. A printed wiring board 60 can be formed by establishing conduction through the connector 55.

尚、第4図示の工程中、第4図fの導電物質55の充填
後、−膜孔の加工あるいは外径加工等のその他の加工工
程が施されるが、その点については第5図によりその一
例を示した0図中56゜57はスルーホール、58はラ
ンドである。
In the step shown in FIG. 4, after filling the conductive material 55 shown in FIG. In Figure 0, which shows an example of this, 56° and 57 are through holes, and 58 is a land.

しかして、導電物質31を導通孔27中に従来のビン方
式あるいはシルクスクリーン方式等により充填した場合
、ランド23.24の内周縁23a、24aと導通孔2
7の開口縁27a。
Therefore, when the conductive material 31 is filled into the conductive hole 27 by the conventional bottle method or silk screen method, the inner peripheral edges 23a, 24a of the lands 23.24 and the conductive hole 2
7 opening edge 27a.

27b間に設けた段部28,29が案内となるばかりか
これが、導電物質31の溜り部としての役割をも果し、
従来の充填方法における導通孔27申への導電物質31
への充填L・うを−挙に解消し、充填精度の安定化を計
り、導通不良を無くし製品の品質向上を果すことができ
る。
The stepped portions 28 and 29 provided between the conductive material 31 not only act as a guide but also serve as a reservoir for the conductive material 31.
Conductive material 31 into 27 conductive holes in conventional filling method
It is possible to eliminate the problem of filling L and burrs at once, stabilize the filling accuracy, eliminate conduction defects, and improve the quality of the product.

また、当該導電物質31の充填後、両面の回路パターン
21.22において電子部品(図示しない)を取り付け
るべく半田浴中にプリント配線板30を浸漬した場合、
絶縁基板20とランド23.24間に熱膨張の差を生じ
両者間に歪みを生じても、これによる導電物質31に対
する影響を段部28.29によって緩和し、導電物質3
1中の亀裂の発生を防止することができるものである。
Further, when the printed wiring board 30 is immersed in a solder bath to attach electronic components (not shown) to the circuit patterns 21 and 22 on both sides after filling with the conductive material 31,
Even if a difference in thermal expansion occurs between the insulating substrate 20 and the lands 23 and 24 and distortion occurs between them, the effect of this on the conductive material 31 is alleviated by the stepped portions 28 and 29, and the conductive material 3
This can prevent the occurrence of cracks in 1.

[発明の効果1 本発明によればプリント配線板において導通孔に導電物
質を充填して両面間の回路等を導通する回路構成の信頼
性を向上できるとともに品質の均一性を図ることができ
る。
[Advantageous Effects of the Invention 1] According to the present invention, it is possible to improve the reliability of a circuit configuration that conducts circuits between both surfaces by filling the conductive holes in a printed wiring board with a conductive material, and to improve the uniformity of quality.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明によって製造するプリント配線板の部分
拡大平面図、第2図は第1図A −、A線断面図、第3
図は導通孔に導電物質を充填した断面図、第4図a−f
は本発明プリント配線板の製造方法の実施例を示す工程
図、第5図は一般孔加工等の処理後のプリント配線板の
断面図、第6図、第7図は従来のプリント配線板の構成
を示す拡大断面図である。 30.60・・・プリント配線板 20.41・・・絶縁基板 21.22・・・回路パターン 23.24,47.48・・・ランド 24.26,49.50・・・ランド孔27.44・・
・導通孔 28.29,51.52・・・段部 31.55・・・4電物質 特許出願人  日本シイエムケイ株式会社代理人 弁理
士  奈   良      武第4 (a) n (c) (e) (d) (f)
FIG. 1 is a partially enlarged plan view of a printed wiring board manufactured according to the present invention, FIG. 2 is a sectional view taken along line A-A in FIG.
The figure is a cross-sectional view of the conductive hole filled with a conductive material, Figure 4 a-f
5 is a process diagram showing an embodiment of the method for manufacturing a printed wiring board of the present invention, FIG. 5 is a sectional view of the printed wiring board after processing such as general hole processing, and FIGS. 6 and 7 are diagrams of a conventional printed wiring board. FIG. 3 is an enlarged sectional view showing the configuration. 30.60...Printed wiring board 20.41...Insulating substrate 21.22...Circuit pattern 23.24, 47.48...Land 24.26, 49.50...Land hole 27. 44...
・Conduction holes 28.29, 51.52...Stepped portions 31.55...4 electric material Patent applicant Japan CMK Co., Ltd. Agent Patent attorney Takeshi Nara 4 (a) n (c) (e) (d) (f)

Claims (2)

【特許請求の範囲】[Claims] (1)絶縁基板の片面または両面に所要の回路パターン
を形成するに当り、当該回路パターン中のランドのラン
ド孔の径を予め当該ランドの中心に位置せしめて貫通す
る導通孔の径より大径に形成する工程と前記回路パター
ン中のランドのランド孔の中心に位置せしめて導通孔を
貫通することにより、前記回路パターン中のランドのラ
ンド孔の内周縁間に段部を形成する工程と、前記導通孔
に導電物質を充填する工程とから成るプリント配線基板
の製造方法。
(1) When forming a required circuit pattern on one or both sides of an insulating substrate, the diameter of the land hole of the land in the circuit pattern is positioned in advance at the center of the land, and the diameter is larger than the diameter of the through hole. and forming a step between the inner peripheral edges of the land hole of the land in the circuit pattern by positioning it at the center of the land hole of the land in the circuit pattern and passing through the conduction hole. A method for manufacturing a printed wiring board, comprising the step of filling the conductive hole with a conductive material.
(2)前記段部を形成する工程は、前記銅張積層板の回
路パターンをエッチングにより形成する工程に関連して
形成することを特徴とする特許請求の範囲第1項記載の
プリント配線板の製造方法。
(2) The step of forming the stepped portion is formed in conjunction with the step of forming the circuit pattern of the copper-clad laminate by etching. Production method.
JP18355185A 1985-08-20 1985-08-20 Manufacture of printed wiring board Pending JPS6243199A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18355185A JPS6243199A (en) 1985-08-20 1985-08-20 Manufacture of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18355185A JPS6243199A (en) 1985-08-20 1985-08-20 Manufacture of printed wiring board

Publications (1)

Publication Number Publication Date
JPS6243199A true JPS6243199A (en) 1987-02-25

Family

ID=16137782

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18355185A Pending JPS6243199A (en) 1985-08-20 1985-08-20 Manufacture of printed wiring board

Country Status (1)

Country Link
JP (1) JPS6243199A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01228196A (en) * 1988-03-08 1989-09-12 Sharp Corp Manufacture of printed wiring board

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5484276A (en) * 1977-12-16 1979-07-05 Hitachi Ltd Method of drilling printed circuit base board
JPS5673498A (en) * 1979-11-20 1981-06-18 Matsushita Electric Ind Co Ltd Method of fabricating through hole printed circutt board
JPS58204596A (en) * 1982-05-24 1983-11-29 新神戸電機株式会社 Method of producing both-side through hole printed circuit board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5484276A (en) * 1977-12-16 1979-07-05 Hitachi Ltd Method of drilling printed circuit base board
JPS5673498A (en) * 1979-11-20 1981-06-18 Matsushita Electric Ind Co Ltd Method of fabricating through hole printed circutt board
JPS58204596A (en) * 1982-05-24 1983-11-29 新神戸電機株式会社 Method of producing both-side through hole printed circuit board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01228196A (en) * 1988-03-08 1989-09-12 Sharp Corp Manufacture of printed wiring board

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