JPS623978B2 - - Google Patents
Info
- Publication number
- JPS623978B2 JPS623978B2 JP11418180A JP11418180A JPS623978B2 JP S623978 B2 JPS623978 B2 JP S623978B2 JP 11418180 A JP11418180 A JP 11418180A JP 11418180 A JP11418180 A JP 11418180A JP S623978 B2 JPS623978 B2 JP S623978B2
- Authority
- JP
- Japan
- Prior art keywords
- tape
- bonding
- semiconductor
- tape carrier
- lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 34
- 238000000034 method Methods 0.000 claims description 8
- 239000008188 pellet Substances 0.000 description 18
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 239000000969 carrier Substances 0.000 description 4
- 230000002950 deficient Effects 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 238000005452 bending Methods 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 235000012431 wafers Nutrition 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 239000004698 Polyethylene Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- -1 polyethylene Polymers 0.000 description 1
- 229920000573 polyethylene Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Description
【発明の詳細な説明】
本発明は、半導体装置用テープキヤリヤーと半
導体素子との接続方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for connecting a tape carrier for a semiconductor device and a semiconductor element.
これまでのテープキヤリヤーを使つた半導体装
置は、テープキヤリヤーに形成されているリード
群があらかじめ半導体装置の電極に相対応する位
置にリード部が配置されるように設計し、一括し
て熱圧着接合法又はウエルド法等で接合して製造
していた。この熱圧着接合又はウエルド接合（ギ
ヤングボンド）はテープキヤリヤーのリードと、
半導体素子電極の位置合せをした後、ヒーターチ
ツプを押し付けて行うが、この際のリードと電極
の位置合せはそれらの相対位置を近づけて行つて
いた。又、テープキヤリヤーを使つた半導体装置
製造では半導体ウエハーはワツクス等を使つて基
板に貼付けた後、ダイシングして、個々のペレツ
トに分割しており、該貼付状態のままギヤングボ
ンドしていたが一枚の半導体ウエハー中には、複
数の不良ペレツトがランダムに含まれているので
良品のペレツトのみ選択しながら製造していた。
従つて不良ペレツトを基板上に残すことになつて
いたのでギヤングボンデイング済み半導体ペレツ
トが、不良ペレツト部を通過する際は、該不良ペ
レツトにぶつからないようにボンデイング済みテ
ープキヤリヤーを送らなければならなかつた。こ
れはボンデイング終了時にウエハー貼付基板自体
を半導体素子ペレツト厚以上の高さ分低めにした
状態で、テープ送りを行えばボンデイング済み半
導体素子と貼付ペレツトとの衝突は避けられる。
このような機能を有するギヤングボンダーは一般
に実用化されている。しかしながらギヤングボン
デイングする場合はボンデイングをしようとする
半導体装置の電極とテープキヤリヤーリードとの
位置合せをそれらが互に近接するようにして行う
為、隣接のボンデイング済みテープキヤリヤーの
半導体素子ペレツトの下面が、ボンデイングしよ
うとする半導体ペレツトの近辺の貼付ペレツト面
に衝突し、該ペレツト面が触れた半導体素子ペレ
ツトは表面の微細な配線層が傷を受け、不良とな
る欠点があつた。これを避ける為に、リードと半
導体ペレツト間隔をあけると位置合せが不正確に
なりボンデイング不良が出るのでこの対処法は使
用不可であり、又テープキヤリヤーのガイドをあ
らかじめＬ字状に曲げておくと、リードの長さが
正常な位置からずれてしまうので、やはりリード
と半導体ペレツト電極位置が、合わない欠点が生
ずる。 Conventional semiconductor devices using tape carriers are designed so that the lead groups formed on the tape carrier are placed in advance at positions corresponding to the electrodes of the semiconductor device, and the leads are heated all at once. They were manufactured by joining using a pressure bonding method or a welding method. This thermocompression bonding or weld bonding (guyang bond) is used to connect the tape carrier lead to
After aligning the semiconductor element electrodes, the heater chip is pressed against the leads, and the leads and electrodes are aligned by bringing their relative positions closer together. In addition, in the manufacture of semiconductor devices using tape carriers, semiconductor wafers are pasted onto substrates using wax or the like, and then diced and separated into individual pellets, which are then subjected to gigantic bonding while remaining in the pasted state. Since a plurality of defective pellets are randomly included in a single semiconductor wafer, only good pellets are selected during manufacture.
Therefore, since the defective pellets were to remain on the substrate, when the large-bonded semiconductor pellets passed through the defective pellets, the bonded tape carrier had to be sent so as not to hit the defective pellets. Nakatsuta. Collision between the bonded semiconductor element and the attached pellet can be avoided by feeding the tape while lowering the wafer-attached substrate itself by a height greater than the thickness of the semiconductor element pellet at the end of bonding.
Guyan bonders having such functions are generally put into practical use. However, in the case of giant bonding, the electrodes of the semiconductor device to be bonded and the tape carrier leads are aligned so that they are close to each other. The lower surface collides with the adhering pellet surface in the vicinity of the semiconductor pellet to be bonded, and the semiconductor element pellets that the pellet surface comes into contact with suffer damage to the fine wiring layer on the surface, resulting in defects. In order to avoid this, if there is a gap between the lead and the semiconductor pellet, the alignment will be inaccurate and bonding failure will occur, so this countermeasure cannot be used, and the guide of the tape carrier should be bent into an L shape in advance. In this case, the length of the lead deviates from its normal position, resulting in the disadvantage that the lead and semiconductor pellet electrode positions do not match.
本発明の目的は、有効な半導体装置用テープキ
ヤリヤーを用いて上記欠点を除去した半導体装置
用テープキヤリヤーと半導体素子との接続方法を
提供することである。 SUMMARY OF THE INVENTION An object of the present invention is to provide a method for connecting a semiconductor device to a tape carrier for semiconductor devices, which eliminates the above-mentioned drawbacks by using an effective tape carrier for semiconductor devices.
本発明の特徴は、一つの半導体素子に接続する
ためのリード群を一組とする複数の該組が、所定
の間隔をおいて配列されてなる半導体装置用テー
プキヤリヤーの該リード群にそれぞれ半導体素子
をギヤングボンデイングにより接続する方法にお
いて、ガイド形状により１つの半導体素子とギヤ
ングボンデイングをおこなう該テープの部分は水
平を保ち、該テープに設けられた複数本がたがい
に平行に延在せるスリツトおよび該ガイド形状に
よりギヤングボンデイングを完了した部分は上方
向を向くようにした半導体装置用テープキヤリヤ
ーと半導体素子との接続方法である。 A feature of the present invention is that a plurality of sets of lead groups for connecting to one semiconductor element are arranged at predetermined intervals, and each lead group is connected to a plurality of lead groups arranged at predetermined intervals. In a method of connecting semiconductor elements by gigantic bonding, the part of the tape that performs gigantic bonding with one semiconductor element is kept horizontal due to the guide shape, and the plurality of tapes provided on the tape extend parallel to each other. This is a method of connecting a semiconductor device to a tape carrier for a semiconductor device in which the portion where the gigantic bonding is completed by the slit and the guide shape faces upward.
次に図面を用いて本発明を説明する。第１図は
従来使用していたテープキヤリヤーの平面図であ
る。同図において、１は絶縁テープ、２はインナ
ーリード、３は送り孔、４はテープに設けられた
開孔を示している。第２図は従来使用していた金
属テープキヤリヤーの平面図である。同図におい
て５は金属テープ部を示している。第３図および
第４図は本発明に用いられるテープキヤリヤーの
実施例の平面図である。第３図、第４図で第１
図、第２図と同じ機能の個所は同じ符号で示して
ある。本発明は可屈折性の素材、例えばポリエス
テル、ポリイミド、ポリエチレン、ガラスエポキ
シ等の絶縁シートやアルミニウム、鉄、ニツケ
ル、銅、金やこれらをメツキした金属シートをテ
ープキヤリヤーテープとしたものは容易に適用出
来る。第３図では各リード群間の中央境界部に複
数本（２本）のスリツト開孔部１０がたがいに平
行に延在して、テープキヤリヤーの長尺方向とほ
ぼ直角をなして設けられている。第４図では巾方
向の中央部には１本のスリツト開孔部９であるが
その両端側には複数本（３本）のスリツト開孔部
１１がたがいに平行に延在して、テープキヤリヤ
ーの長尺方向とほぼ直角をなして設けられてい
る。本発明ではスリツト開孔部が存在するため、
しかも複数本平行して存在するためにテープキヤ
リヤーのリード群は個々のリード単位毎に、該ス
リツト開孔部で容易に屈折する特性を持つ。この
為、テープキヤリヤーのガイドの形状に従つて、
容易に屈折するので、ガイド形状を、テープキヤ
リヤードの単位毎に微小角屈折させておき、ギヤ
ングボンデイング部は平面で、ギヤングボンドが
終了した部分は、一定仰角を有するようにしてお
けばよい。これによりギヤングボンド時に、テー
プキヤリヤーリードと接続すべき半導体素子の位
置合せ及びボンデイング際中の隣接半導体ペレツ
トと接続済み半導体ペレツトが衝突することはな
く安定したギヤングボンデイングが可能となる。
このようなスリツト開孔部は、たとえば120ミク
ロン厚35mm巾のポリイミド絶縁テープ上にインナ
ーリード用の開孔部を設ける段階でプレス加工に
より150ミクロン巾、20mm長の複数本のスリツト
を前記インナーリード用開孔部間中央に設けた後
に、35ミクロン厚の銅箔を貼り付け、前記開孔内
にインナーリード、スリツト部は開孔になるよう
にホトレジスト処理エツチング加工を施して形成
することができる。このようにして、スリツトを
ポリイミドテープ上に形成したものはスリツト部
の屈折が容易で、テープの屈折による歪応力はイ
ンナーリードに殆んど負荷されないので、テープ
屈折によるインナーリードのずれも生せず、半導
体ペレツト電極との位置合せも極めて容易とな
る。又４図の銅板のみのテープキヤリヤーの場合
も同様にそのスリツトを形成することもできる
し、又は各リードの形成的に設けることもでき
る。 Next, the present invention will be explained using the drawings. FIG. 1 is a plan view of a conventionally used tape carrier. In the figure, 1 is an insulating tape, 2 is an inner lead, 3 is a feed hole, and 4 is an opening provided in the tape. FIG. 2 is a plan view of a conventionally used metal tape carrier. In the figure, 5 indicates a metal tape portion. 3 and 4 are plan views of embodiments of tape carriers used in the present invention. 1 in Figures 3 and 4.
2. Portions having the same functions as those in FIGS. 2 and 2 are designated by the same reference numerals. The present invention can easily use flexible materials such as insulating sheets made of polyester, polyimide, polyethylene, glass epoxy, etc., aluminum, iron, nickel, copper, gold, or metal sheets plated with these materials as tape carrier tapes. Can be applied. In FIG. 3, a plurality of (two) slit openings 10 are provided at the central boundary between each lead group, extending parallel to each other and substantially perpendicular to the longitudinal direction of the tape carrier. ing. In Fig. 4, there is one slit opening 9 in the center in the width direction, but a plurality (three) of slit openings 11 extend parallel to each other on both ends of the slit opening 9. It is provided approximately perpendicular to the longitudinal direction of the carrier. In the present invention, since there is a slit opening,
Moreover, since a plurality of leads exist in parallel, each lead unit of the tape carrier has a characteristic of being easily bent at the slit opening. For this reason, according to the shape of the tape carrier guide,
Since it is easily bent, the guide shape may be bent by a small angle for each unit of tape carrier, the guyang bonding part is a plane, and the part where the guyang bond ends has a constant elevation angle. This makes it possible to align the tape carrier lead and the semiconductor element to be connected at the time of gigantic bonding, and to avoid collisions between adjacent semiconductor pellets and connected semiconductor pellets during bonding, thereby making it possible to perform stable gigantic bonding.
Such slit openings can be made by pressing a plurality of slits 150 microns wide and 20 mm long at the stage of forming openings for inner leads on a polyimide insulating tape with a thickness of 120 microns and a width of 35 mm. After forming a copper foil in the center between the openings, a 35 micron thick copper foil can be pasted, and inner leads can be formed in the openings, and the slits can be formed by photoresist processing and etching so that they become open holes. . In this way, when the slit is formed on the polyimide tape, the slit part is easily bent, and the strain stress caused by the bending of the tape is hardly applied to the inner lead, so the inner lead does not shift due to tape bending. First, alignment with the semiconductor pellet electrode becomes extremely easy. Also, in the case of the tape carrier made of only a copper plate as shown in FIG. 4, the slits can be formed in the same way, or they can be formed in each lead.
第１図および第２図はそれぞれ従来技術に用い
られるテープキヤリヤーを示す平面図である。第
３図および第４図はそれぞれ本発明の実施例に用
いるテープキヤリヤーの平面図である。
尚、図において、１……絶縁テープ、２……イ
ンナーリード、３……送り孔、４……インナーリ
ード用開孔、５……金属テープ、６，７，７′，
８，９，１０，１１……スリツト。
1 and 2 are plan views each showing a tape carrier used in the prior art. FIGS. 3 and 4 are plan views of tape carriers used in embodiments of the present invention, respectively. In the figure, 1...insulating tape, 2...inner lead, 3...spring hole, 4...opening for inner lead, 5...metal tape, 6, 7, 7',
8, 9, 10, 11...slit.
Claims (1)
を一組とする複数の該組が、所定の間隔をおいて
配列されてなる半導体装置用テープキヤリヤーの
該リード群にそれぞれ半導体素子をギヤングボン
デイングにより接続する方法において、ガイド形
状により１つの半導体素子とギヤングボンデイン
グをおこなう該テープの部分は水平を保ち、該テ
ープに設けられた複数本がたがいに平行に延在せ
るスリツトおよび該ガイド形状によりギヤングボ
ンデイングを完了した部分は上方向を向くように
したことを特徴とする半導体装置用テープキヤリ
ヤーと半導体素子との接続方法。1. A semiconductor device is connected to each lead group of a tape carrier for a semiconductor device, in which a plurality of lead groups for connecting to one semiconductor device are arranged at predetermined intervals. In the bonding method, the part of the tape that performs gang bonding with one semiconductor element is kept horizontal due to the guide shape, and a plurality of slits provided in the tape extend in parallel to each other, and the guide shape 1. A method for connecting a tape carrier for a semiconductor device and a semiconductor element, characterized in that the part where gigantic bonding has been completed is directed upward.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11418180A JPS5737866A (en) | 1980-08-20 | 1980-08-20 | Tape carrier for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11418180A JPS5737866A (en) | 1980-08-20 | 1980-08-20 | Tape carrier for semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5737866A JPS5737866A (en) | 1982-03-02 |
| JPS623978B2 true JPS623978B2 (en) | 1987-01-28 |
Family
ID=14631214
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11418180A Granted JPS5737866A (en) | 1980-08-20 | 1980-08-20 | Tape carrier for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5737866A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020017071A1 (en) | 2018-07-18 | 2020-01-23 | 株式会社アスカネット | Method for manufacturing stereoscopic image formation device and stereoscopic image formation device |
| US11402654B2 (en) | 2017-06-01 | 2022-08-02 | Asukanet Company, Ltd. | Method for manufacturing stereoscopic image forming device, and stereoscopic image forming device |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4721992A (en) * | 1986-06-26 | 1988-01-26 | National Semiconductor Corporation | Hinge tape |
| JPH0754813B2 (en) * | 1986-08-29 | 1995-06-07 | 株式会社東芝 | Film carrier board |
| JP2755229B2 (en) * | 1995-10-06 | 1998-05-20 | セイコーエプソン株式会社 | Electronic circuit board parts |
-
1980
- 1980-08-20 JP JP11418180A patent/JPS5737866A/en active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11402654B2 (en) | 2017-06-01 | 2022-08-02 | Asukanet Company, Ltd. | Method for manufacturing stereoscopic image forming device, and stereoscopic image forming device |
| WO2020017071A1 (en) | 2018-07-18 | 2020-01-23 | 株式会社アスカネット | Method for manufacturing stereoscopic image formation device and stereoscopic image formation device |
| KR20210028698A (en) | 2018-07-18 | 2021-03-12 | 가부시키가이샤 아스카넷토 | Manufacturing method of three-dimensional image forming apparatus and three-dimensional image forming apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5737866A (en) | 1982-03-02 |
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