JPS6239383U - - Google Patents
Info
- Publication number
- JPS6239383U JPS6239383U JP13210085U JP13210085U JPS6239383U JP S6239383 U JPS6239383 U JP S6239383U JP 13210085 U JP13210085 U JP 13210085U JP 13210085 U JP13210085 U JP 13210085U JP S6239383 U JPS6239383 U JP S6239383U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- digital data
- clamps
- video signal
- composite video
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000002131 composite material Substances 0.000 claims description 4
- 230000005540 biological transmission Effects 0.000 claims 1
- 238000005070 sampling Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Television Systems (AREA)
Description
第1図は本考案回路の一実施例を示す回路図、
第2図は従来回路の一例を示す回路図である。
11……複合映像信号入力端子、12……第1
のクランプ回路、13……ゲートパルス入力端子
、14……第2のクランプ回路、15……コンパ
レータ、16……出力端子、D1,D2……クラ
ンプ用ダイオード。
FIG. 1 is a circuit diagram showing an embodiment of the circuit of the present invention;
FIG. 2 is a circuit diagram showing an example of a conventional circuit. 11...Composite video signal input terminal, 12...First
13... Gate pulse input terminal, 14... Second clamp circuit, 15... Comparator, 16... Output terminal, D1 , D2 ... Clamping diode.
Claims (1)
デイジタルデータを抜取る回路において、上記複
合映像信号をクランプする第1のクランプ回路と
、上記デイジタルデータの伝送期間のみ所定論理
値となる2値信号であるゲートパルスをクランプ
する回路であつて該第1のクランプ回路と同一構
成の第2のクランプ回路と、該第1及び第2のク
ランプ回路よりの該複合映像信号と該ゲートパル
スとを夫々レベル比較し、上記デイジタルデータ
を出力するコンパレータとより構成したデイジタ
ルデータの抜取り回路。 A circuit for extracting digital data superimposed on a blanking period of a composite video signal includes a first clamp circuit that clamps the composite video signal, and a binary signal that has a predetermined logical value only during the transmission period of the digital data. a second clamp circuit that clamps the gate pulse and has the same configuration as the first clamp circuit; and a circuit that clamps the gate pulse and the composite video signal from the first and second clamp circuits, respectively. A digital data sampling circuit consisting of a comparator that compares levels and outputs the digital data.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985132100U JPH0354468Y2 (en) | 1985-08-29 | 1985-08-29 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985132100U JPH0354468Y2 (en) | 1985-08-29 | 1985-08-29 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6239383U true JPS6239383U (en) | 1987-03-09 |
JPH0354468Y2 JPH0354468Y2 (en) | 1991-12-02 |
Family
ID=31031171
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1985132100U Expired JPH0354468Y2 (en) | 1985-08-29 | 1985-08-29 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0354468Y2 (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55147827A (en) * | 1979-05-08 | 1980-11-18 | Mitsubishi Electric Corp | Signal extracting circuit |
JPS5619286A (en) * | 1979-07-25 | 1981-02-23 | Sharp Corp | Data slicing circuit |
JPS57208780A (en) * | 1981-06-18 | 1982-12-21 | Pioneer Electronic Corp | Wave shaping circuit |
JPS594283A (en) * | 1982-06-29 | 1984-01-11 | Fujitsu General Ltd | Slice level control circuit in character signal extracting circuit |
-
1985
- 1985-08-29 JP JP1985132100U patent/JPH0354468Y2/ja not_active Expired
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55147827A (en) * | 1979-05-08 | 1980-11-18 | Mitsubishi Electric Corp | Signal extracting circuit |
JPS5619286A (en) * | 1979-07-25 | 1981-02-23 | Sharp Corp | Data slicing circuit |
JPS57208780A (en) * | 1981-06-18 | 1982-12-21 | Pioneer Electronic Corp | Wave shaping circuit |
JPS594283A (en) * | 1982-06-29 | 1984-01-11 | Fujitsu General Ltd | Slice level control circuit in character signal extracting circuit |
Also Published As
Publication number | Publication date |
---|---|
JPH0354468Y2 (en) | 1991-12-02 |
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