JPS6235394U - - Google Patents
Info
- Publication number
- JPS6235394U JPS6235394U JP12731785U JP12731785U JPS6235394U JP S6235394 U JPS6235394 U JP S6235394U JP 12731785 U JP12731785 U JP 12731785U JP 12731785 U JP12731785 U JP 12731785U JP S6235394 U JPS6235394 U JP S6235394U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- blanking
- video signal
- video
- black level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003321 amplification Effects 0.000 claims description 7
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 7
- 238000001514 detection method Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Picture Signal Circuits (AREA)
Description
第1図は本考案装置の一実施例のブロツク回路
図、第2図は同実施例の動作説明のための波形図
である。
1……映像入力端子、2……第1映像増幅回路
、3……第2映像増幅回路、4……映像出力回路
、5……CRT、6……ブランキング回路、7…
…第4映像増幅回路、8……黒レベル検出回路、
9……ブランキングパルス生成回路。
FIG. 1 is a block circuit diagram of an embodiment of the device of the present invention, and FIG. 2 is a waveform diagram for explaining the operation of the embodiment. 1...Video input terminal, 2...First video amplification circuit, 3...Second video amplification circuit, 4...Video output circuit, 5...CRT, 6...Blanking circuit, 7...
...4th video amplification circuit, 8...black level detection circuit,
9...Blanking pulse generation circuit.
Claims (1)
供給され、その間にブランキング回路から水平及
び垂直ブランキング信号が重畳されるCRTデイ
スプレイ装置において、前記映像増幅回路とは別
個に前記映像信号を増幅するもう一つの映像増幅
回路と、該映像増幅回路より得られる映像信号中
の黒レベルを検出する黒レベル検出回路と、該黒
レベル検出回路の検出出力に基いて映像信号が黒
レベル以下にある期間中ブランキングパルスを生
成するブランキングパルス生成回路とを具備して
なり、前記ブランキングパルスを前記ブランキン
グ回路を経て水平及び垂直ブランキング信号とと
もに、映像信号に重畳するようにしたことを特徴
とするCRTデイスプレイ装置。 In a CRT display device in which a video signal is supplied to a CRT via a plurality of video amplification circuits, and horizontal and vertical blanking signals are superimposed from a blanking circuit between them, the video signal is amplified separately from the video amplification circuit. another video amplification circuit; a black level detection circuit that detects the black level in the video signal obtained from the video amplification circuit; and a period during which the video signal is below the black level based on the detection output of the black level detection circuit. and a blanking pulse generation circuit that generates a medium blanking pulse, and the blanking pulse is superimposed on the video signal together with the horizontal and vertical blanking signals via the blanking circuit. CRT display device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12731785U JPS6235394U (en) | 1985-08-20 | 1985-08-20 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12731785U JPS6235394U (en) | 1985-08-20 | 1985-08-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6235394U true JPS6235394U (en) | 1987-03-02 |
Family
ID=31021950
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12731785U Pending JPS6235394U (en) | 1985-08-20 | 1985-08-20 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6235394U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002073580A1 (en) * | 2001-03-12 | 2002-09-19 | Sony Corporation | Cathode-ray tube |
-
1985
- 1985-08-20 JP JP12731785U patent/JPS6235394U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002073580A1 (en) * | 2001-03-12 | 2002-09-19 | Sony Corporation | Cathode-ray tube |
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