JPS58147360U - pedestal clamp circuit - Google Patents

pedestal clamp circuit

Info

Publication number
JPS58147360U
JPS58147360U JP4305982U JP4305982U JPS58147360U JP S58147360 U JPS58147360 U JP S58147360U JP 4305982 U JP4305982 U JP 4305982U JP 4305982 U JP4305982 U JP 4305982U JP S58147360 U JPS58147360 U JP S58147360U
Authority
JP
Japan
Prior art keywords
pulse
diode
pedestal clamp
pedestal
clamp circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4305982U
Other languages
Japanese (ja)
Inventor
縫村 義己
Original Assignee
株式会社東芝
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社東芝 filed Critical 株式会社東芝
Priority to JP4305982U priority Critical patent/JPS58147360U/en
Publication of JPS58147360U publication Critical patent/JPS58147360U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は映像信号及びデータ信号をブラウン管上に切換
え表示する一般的なディスプレー装置の要部ブロック図
、第2図は同上ブロック図の映像波形及び本考案の実施
例によるペデスタルクランプ波形を示すタイミングチャ
ート図、第3図は本考案に係るペデスタルクランプ回路
の実施例を示す回路図である。 11・・・・・・同期パルス発生回路、12・・・・・
・ダイオード、13・・・・・・抵抗、14・・・・・
・ブランキングパルス発生回路、15・・・・・・出力
端、IH・・・・・・1水平周期。
Fig. 1 is a block diagram of main parts of a general display device that switches and displays video signals and data signals on a cathode ray tube, and Fig. 2 is a timing diagram showing the video waveform of the same block diagram and the pedestal clamp waveform according to the embodiment of the present invention. The chart diagram and FIG. 3 are circuit diagrams showing an embodiment of the pedestal clamp circuit according to the present invention. 11... Synchronous pulse generation circuit, 12...
・Diode, 13... Resistor, 14...
・Blanking pulse generation circuit, 15... Output terminal, IH... 1 horizontal period.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力信号に対しペデスタルクランプ機能を具備したブラ
ウン管表示形のディスプレー装置に於いて、同期パルス
発生回路の出力部をダイオードのカソードに接続し、且
つ、そのアノードには抵抗を介してブランキングパルス
発生回路を接続し、上記ダイオードと抵抗の接続点を出
力端とし、同期信号に対応してブランキングパルスの一
部を抜き取った凹状のパルスを前記出力端に形成し、こ
の凹状パルスをペデスタル・クランプ用パルスとして用
いることを特徴とするペデスタルクランプ回路。
In a cathode ray tube type display device equipped with a pedestal clamp function for input signals, the output part of the synchronizing pulse generating circuit is connected to the cathode of the diode, and the blanking pulse generating circuit is connected to the anode of the diode through a resistor. The connection point between the diode and the resistor is used as the output terminal, and a concave pulse obtained by extracting a part of the blanking pulse in response to the synchronization signal is formed at the output terminal, and this concave pulse is used for pedestal clamping. A pedestal clamp circuit characterized by being used as a pulse.
JP4305982U 1982-03-29 1982-03-29 pedestal clamp circuit Pending JPS58147360U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4305982U JPS58147360U (en) 1982-03-29 1982-03-29 pedestal clamp circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4305982U JPS58147360U (en) 1982-03-29 1982-03-29 pedestal clamp circuit

Publications (1)

Publication Number Publication Date
JPS58147360U true JPS58147360U (en) 1983-10-04

Family

ID=30054156

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4305982U Pending JPS58147360U (en) 1982-03-29 1982-03-29 pedestal clamp circuit

Country Status (1)

Country Link
JP (1) JPS58147360U (en)

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