JPS60144361U - image display device - Google Patents

image display device

Info

Publication number
JPS60144361U
JPS60144361U JP3014384U JP3014384U JPS60144361U JP S60144361 U JPS60144361 U JP S60144361U JP 3014384 U JP3014384 U JP 3014384U JP 3014384 U JP3014384 U JP 3014384U JP S60144361 U JPS60144361 U JP S60144361U
Authority
JP
Japan
Prior art keywords
display device
image display
clamp
pulse
synchronization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3014384U
Other languages
Japanese (ja)
Inventor
縫村 義己
Original Assignee
株式会社東芝
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社東芝 filed Critical 株式会社東芝
Priority to JP3014384U priority Critical patent/JPS60144361U/en
Publication of JPS60144361U publication Critical patent/JPS60144361U/en
Pending legal-status Critical Current

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  • Picture Signal Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の基体的な直流再生方式を示すブロック図
、第2図は第1図の直流再生方式の動作を説明するため
のタイミングチャート、第3図は従来のPCB切換によ
る画像表示装置のブロック図、第4図は第3図の画像表
示装置におけるCRT表示状態を示す図、第5図はこの
考案の画像表示装置の一実施例の構成を示すブロック図
、第6図は第5図の画像表示装置におけるクランプのタ
イミングを示す図、第7図は第5図の画像衣−示装置に
より得られたCRTに表示する信号を示す図である。 1・・・・・・同期分離回路、14・・・・・・クラン
プ回路、9・・・・・・コンピュータ、10・・・・・
・切換回路、13・・・・・・CRT。
Fig. 1 is a block diagram showing a conventional basic DC regeneration system, Fig. 2 is a timing chart for explaining the operation of the DC regeneration system shown in Fig. 1, and Fig. 3 is a conventional image display device using PCB switching. 4 is a block diagram showing the CRT display state in the image display device of FIG. 3, FIG. 5 is a block diagram showing the configuration of an embodiment of the image display device of this invention, and FIG. FIG. 7 is a diagram showing the timing of clamping in the image display device shown in FIG. 5, and FIG. 7 is a diagram showing the signals displayed on the CRT obtained by the image display device shown in FIG. 1... Synchronous separation circuit, 14... Clamp circuit, 9... Computer, 10...
・Switching circuit, 13...CRT.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複合映像信号に含まれる同期信号と同一タイミングのパ
ルスを抽出する同期分離回路と、この同期分離回路で抽
出されたパルスをクランプパルスとして上記複合映像信
号の同期信号を表示画面の黒レベルに一致するようにク
ランプをかけて再生するクランプ回路とよりなる画像表
示装置。
A synchronization separation circuit extracts a pulse with the same timing as the synchronization signal included in the composite video signal, and the pulse extracted by this synchronization separation circuit is used as a clamp pulse to match the synchronization signal of the composite video signal to the black level of the display screen. An image display device consisting of a clamp circuit that applies a clamp to reproduce images.
JP3014384U 1984-03-02 1984-03-02 image display device Pending JPS60144361U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3014384U JPS60144361U (en) 1984-03-02 1984-03-02 image display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3014384U JPS60144361U (en) 1984-03-02 1984-03-02 image display device

Publications (1)

Publication Number Publication Date
JPS60144361U true JPS60144361U (en) 1985-09-25

Family

ID=30529572

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3014384U Pending JPS60144361U (en) 1984-03-02 1984-03-02 image display device

Country Status (1)

Country Link
JP (1) JPS60144361U (en)

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