JPS5957061U - blanking circuit - Google Patents

blanking circuit

Info

Publication number
JPS5957061U
JPS5957061U JP15312482U JP15312482U JPS5957061U JP S5957061 U JPS5957061 U JP S5957061U JP 15312482 U JP15312482 U JP 15312482U JP 15312482 U JP15312482 U JP 15312482U JP S5957061 U JPS5957061 U JP S5957061U
Authority
JP
Japan
Prior art keywords
circuit
blanking circuit
grid
retrace pulses
blanking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15312482U
Other languages
Japanese (ja)
Inventor
和彦 黒田
Original Assignee
アルプス電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by アルプス電気株式会社 filed Critical アルプス電気株式会社
Priority to JP15312482U priority Critical patent/JPS5957061U/en
Publication of JPS5957061U publication Critical patent/JPS5957061U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はCRTのカソード・第1グリッド間の電圧を示
すタイムチャート、第2図は従来の帰線消去回路を示す
ブロック図、第3図は従来例のクランプ回路を示す回路
図、牽4図は本考案による帰線消去回路を示すブロック
図、第5図は実施例のHV合成回路、HVスイッチング
回路を示す回路図である。 14・・・垂直同期信号回路、15川水平同期信号回路
、16・・−HV合成回路、17・・・HVスイッチン
グ回路、18・・・CRT0
Fig. 1 is a time chart showing the voltage between the CRT cathode and the first grid, Fig. 2 is a block diagram showing a conventional blanking circuit, and Fig. 3 is a circuit diagram showing a conventional clamp circuit. The figure is a block diagram showing a blanking circuit according to the present invention, and FIG. 5 is a circuit diagram showing an HV combining circuit and an HV switching circuit according to an embodiment. 14... Vertical synchronization signal circuit, 15 Horizontal synchronization signal circuit, 16...-HV synthesis circuit, 17... HV switching circuit, 18... CRT0

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 垂直帰線パルスと水平帰線パルスとを合成するHV合成
回路と、該HV合成回路からの出力信号によってブラウ
ン管の第1グリツドに必要な電圧を入力するHVスイッ
チング回路とから成り、グリッド電圧を帰線時間に低下
させることを特徴とする帰線消去回路。
It consists of an HV synthesis circuit that synthesizes vertical retrace pulses and horizontal retrace pulses, and an HV switching circuit that inputs the necessary voltage to the first grid of the cathode ray tube using the output signal from the HV synthesis circuit, and returns the grid voltage. A blanking circuit characterized in that it reduces the line time.
JP15312482U 1982-10-08 1982-10-08 blanking circuit Pending JPS5957061U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15312482U JPS5957061U (en) 1982-10-08 1982-10-08 blanking circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15312482U JPS5957061U (en) 1982-10-08 1982-10-08 blanking circuit

Publications (1)

Publication Number Publication Date
JPS5957061U true JPS5957061U (en) 1984-04-13

Family

ID=30338859

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15312482U Pending JPS5957061U (en) 1982-10-08 1982-10-08 blanking circuit

Country Status (1)

Country Link
JP (1) JPS5957061U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5352352U (en) * 1976-10-07 1978-05-04

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5352352U (en) * 1976-10-07 1978-05-04

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