JPS6230653B2 - - Google Patents

Info

Publication number
JPS6230653B2
JPS6230653B2 JP16913782A JP16913782A JPS6230653B2 JP S6230653 B2 JPS6230653 B2 JP S6230653B2 JP 16913782 A JP16913782 A JP 16913782A JP 16913782 A JP16913782 A JP 16913782A JP S6230653 B2 JPS6230653 B2 JP S6230653B2
Authority
JP
Japan
Prior art keywords
address
register
direct
memory
addressing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP16913782A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5957347A (ja
Inventor
Takashi Sakao
Katsuhiko Ueda
Toshiaki Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP16913782A priority Critical patent/JPS5957347A/ja
Publication of JPS5957347A publication Critical patent/JPS5957347A/ja
Publication of JPS6230653B2 publication Critical patent/JPS6230653B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
JP16913782A 1982-09-27 1982-09-27 メモリアドレス制御装置 Granted JPS5957347A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16913782A JPS5957347A (ja) 1982-09-27 1982-09-27 メモリアドレス制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16913782A JPS5957347A (ja) 1982-09-27 1982-09-27 メモリアドレス制御装置

Publications (2)

Publication Number Publication Date
JPS5957347A JPS5957347A (ja) 1984-04-02
JPS6230653B2 true JPS6230653B2 (enrdf_load_stackoverflow) 1987-07-03

Family

ID=15880966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16913782A Granted JPS5957347A (ja) 1982-09-27 1982-09-27 メモリアドレス制御装置

Country Status (1)

Country Link
JP (1) JPS5957347A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS5957347A (ja) 1984-04-02

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