JPS6230162U - - Google Patents

Info

Publication number
JPS6230162U
JPS6230162U JP12096685U JP12096685U JPS6230162U JP S6230162 U JPS6230162 U JP S6230162U JP 12096685 U JP12096685 U JP 12096685U JP 12096685 U JP12096685 U JP 12096685U JP S6230162 U JPS6230162 U JP S6230162U
Authority
JP
Japan
Prior art keywords
semiconductor integrated
power supply
integrated circuit
ammeter
pulse generator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12096685U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12096685U priority Critical patent/JPS6230162U/ja
Publication of JPS6230162U publication Critical patent/JPS6230162U/ja
Pending legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の実施例である半導体集積回路
試験装置のブロツク図、第2図a〜gは第1図の
本考案の動作原理を説明するための波形図である
。 1…電源、2…試料、3…切替器、4…電流計
、5…切替器、6…パルス発生器、7…制御装置
FIG. 1 is a block diagram of a semiconductor integrated circuit testing apparatus which is an embodiment of the present invention, and FIGS. 2a to 2g are waveform diagrams for explaining the operating principle of the present invention shown in FIG. DESCRIPTION OF SYMBOLS 1...Power source, 2...Sample, 3...Switcher, 4...Ammeter, 5...Switcher, 6...Pulse generator, 7...Control device.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体集積回路のラツチアツプ試験装置におい
て、半導体集積回路の電源端子にバイアスを印加
する電源と、半導体集積回路の入出力端子にパル
ス電流を印加するパルス発生器と、パルス電流を
検知する電流計及び電流値を記録する記録計と、
試験端子を選択する切替器と、電源、パルス発生
器、電流計、切替器を制御する制御装置とを有す
ることを特徴とする半導体集積回路試験装置。
A latch-up test device for semiconductor integrated circuits includes a power supply that applies bias to the power supply terminals of the semiconductor integrated circuit, a pulse generator that applies pulsed current to the input/output terminals of the semiconductor integrated circuit, and an ammeter and current meter that detects the pulsed current. A recorder to record the value,
A semiconductor integrated circuit testing device comprising a switch for selecting a test terminal, and a control device for controlling a power supply, a pulse generator, an ammeter, and a switch.
JP12096685U 1985-08-07 1985-08-07 Pending JPS6230162U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12096685U JPS6230162U (en) 1985-08-07 1985-08-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12096685U JPS6230162U (en) 1985-08-07 1985-08-07

Publications (1)

Publication Number Publication Date
JPS6230162U true JPS6230162U (en) 1987-02-23

Family

ID=31009784

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12096685U Pending JPS6230162U (en) 1985-08-07 1985-08-07

Country Status (1)

Country Link
JP (1) JPS6230162U (en)

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