JPS6229913B2 - - Google Patents
Info
- Publication number
- JPS6229913B2 JPS6229913B2 JP55085082A JP8508280A JPS6229913B2 JP S6229913 B2 JPS6229913 B2 JP S6229913B2 JP 55085082 A JP55085082 A JP 55085082A JP 8508280 A JP8508280 A JP 8508280A JP S6229913 B2 JPS6229913 B2 JP S6229913B2
- Authority
- JP
- Japan
- Prior art keywords
- diffusion layer
- source
- drain
- solid
- blooming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000009792 diffusion process Methods 0.000 claims description 26
- 239000000758 substrate Substances 0.000 claims description 10
- 239000004065 semiconductor Substances 0.000 claims 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 239000012535 impurity Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000003384 imaging method Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/148—Charge coupled imagers
- H01L27/14887—Blooming suppression
Description
【発明の詳細な説明】
本発明は固体撮像素子、特にブルーミングの発
生を抑制した固体撮像素子に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state image sensor, and particularly to a solid-state image sensor that suppresses the occurrence of blooming.
一般に、CCD形，MOS形などで代表される固
体撮像素子は、受光面に強い外部光が入射する
と、ブルーミングが発生し、画質を著しく低下す
ることはすでに知られている。本発明はこのブル
ーミングの発生を防止した固体撮像素子に関する
ものである。通常、このブルーミングを防止する
手段としてホトダイオードをｎ―Ｐ―ｎ構造と
し、ブルーミング発生時にｎ―Ｐ―ｎ接合で構成
されているトランジスタを導通させる方法，ゲー
ト下に高濃度不純物層を設ける方法，あるいはホ
トダイオード上部に光導電膜を設ける方法などが
ある。そして、これらの手段のうちで前者の二つ
の方法ではブルーミングに対して十分な効果が得
られないばかりか、製造プロセスが複雑となるな
どの欠点を有している。また、後者の方法ではウ
エハに形成されMOS上部に光導電膜を接触させ
るが、その製造技術は確立されていない。 In general, it is already known that in solid-state image sensors, such as CCD type and MOS type, blooming occurs when strong external light is incident on the light-receiving surface, which significantly deteriorates the image quality. The present invention relates to a solid-state imaging device that prevents the occurrence of blooming. Usually, as a means to prevent this blooming, a method is adopted in which the photodiode is made into an n-P-n structure, and a transistor composed of an n-P-n junction is made conductive when blooming occurs, and a method is provided in which a high concentration impurity layer is provided under the gate. Alternatively, there is a method in which a photoconductive film is provided above the photodiode. Of these methods, the former two methods not only do not provide a sufficient effect on blooming, but also have drawbacks such as complicating the manufacturing process. In addition, in the latter method, a photoconductive film is formed on a wafer and contacts the top of the MOS, but the manufacturing technology has not been established.
第１図はMOS形固体撮像素子の一例を示す要
部構成図である。同図において、ホトダイオード
１とMOSトランジスタ２とによつて構成される
画素３が行，列方向に配列されており、水平シフ
トレジスタ４および垂直シフトレジスタ５によつ
て選択された画素にビデオバイアス６から負荷抵
抗７水平スイツチMOS８を通して充電電流が流
れ、負荷抵抗による電圧降下部を光信号として検
出し、コンデンサ９を介してビデオアンプで増幅
される。 FIG. 1 is a diagram showing the main parts of an example of a MOS solid-state image sensor. In the figure, pixels 3 each made up of a photodiode 1 and a MOS transistor 2 are arranged in the row and column directions, and a video bias 6 is applied to the pixel selected by a horizontal shift register 4 and a vertical shift register 5. A charging current flows from the load resistor 7 through the horizontal switch MOS 8, and the voltage drop caused by the load resistor is detected as an optical signal, which is amplified by the video amplifier via the capacitor 9.
第２図は第１図に示す画素３の要部拡大断面構
成図である。同図において、例えばＰ型シリコン
基板１０の主上面には、MOS型トランジスタ形
成領域にｎ型不純物を選択的に拡散させてソース
層およびドレイン層とするソース拡散層１１およ
びドレイン拡散層１２が形成されている。また、
このMOS型トランジスタ形成領域部、すなわち
ソース拡散層１１，ドレイン拡散層１２およびこ
の間のＰ型シリコン基板１０上には、膜厚の小さ
い絶縁層１３が、そして他の領域部には膜厚の大
なるシリコン酸化膜１４が形成されている。ま
た、このソース拡散層１１、ドレイン拡散層１２
の上面にはそれぞれドレイン電極１５が、そし
て、絶縁層１３上にはゲート電極１６が例えばア
ルミニウム蒸着膜で形成されている。 FIG. 2 is an enlarged cross-sectional configuration diagram of the main part of the pixel 3 shown in FIG. 1. In the figure, for example, on the main upper surface of a P-type silicon substrate 10, a source diffusion layer 11 and a drain diffusion layer 12 are formed by selectively diffusing n-type impurities into a MOS transistor formation region to form a source layer and a drain layer. has been done. Also,
A thin insulating layer 13 is formed on the MOS transistor formation region, that is, on the source diffusion layer 11, the drain diffusion layer 12, and on the P-type silicon substrate 10 between them. A silicon oxide film 14 is formed. In addition, this source diffusion layer 11 and drain diffusion layer 12
A drain electrode 15 is formed on the upper surface of each of the transistors, and a gate electrode 16 is formed on the insulating layer 13 using, for example, an aluminum vapor-deposited film.
このように構成された固体撮像素子において、
第１図に示すホトダイオード１に外部光が照射さ
れると、ソース拡散層１１，Ｐ型シリコン基板１
０が順方向にバイアスされ、ソース拡散層１１か
ら電荷が流出し、ソース拡散層１１とドレイン拡
散層１２との間に電荷に対するバリアがないの
で、この流出した電荷がドレイン拡散層１２への
簡単に流れ易くなり、したがつてブルーミングが
発生することになる。 In the solid-state image sensor configured in this way,
When the photodiode 1 shown in FIG. 1 is irradiated with external light, the source diffusion layer 11, the P-type silicon substrate 1
0 is biased in the forward direction, charges flow out from the source diffusion layer 11, and since there is no barrier to charges between the source diffusion layer 11 and the drain diffusion layer 12, this leaked charge is easily transferred to the drain diffusion layer 12. This results in the occurrence of blooming.
したがつて本発明は、製造プロセスを複雑にす
ることなく、拡散層の深さを熱酸化膜のシリコン
表面よりの膜厚よりも浅くすることによつて、ブ
ルーミングの発生を抑制した固体撮像素子を提供
することを目的としている。以下図面を用いて本
発明の実施例を詳細に説明する。 Therefore, the present invention provides a solid-state imaging device in which the occurrence of blooming is suppressed by making the depth of the diffusion layer shallower than the thickness of the thermal oxide film from the silicon surface without complicating the manufacturing process. is intended to provide. Embodiments of the present invention will be described in detail below using the drawings.
第３図は本発明による固体撮像素子に係わる画
素の一実施例を説明するための要部拡大断面図で
あり、第２図と同記号は同一要素となるのでその
説明を省略する。同図において、例えばＰ型シリ
コン基板１０の主上面に選択的に厚いシリコン酸
化膜１７，１７′を形成し、この酸化膜１７，１
７′のない部分にソース拡散層１１，ドレイン拡
散層１２を酸化膜１７，１７′の厚さよりも浅く
形成する。次にアクテイブMOSのしきい値電圧
を低く制御するためにゲートとして用いる酸化膜
１７′をエツチングし、このエツチング部分に例
えばアルミニウム蒸着によりゲーム電極１６を形
成する。以後、通常のMOS製造プロセスにした
がつてMOS型トランジスタを完成する。 FIG. 3 is an enlarged cross-sectional view of a main part for explaining one embodiment of a pixel related to a solid-state image sensor according to the present invention, and since the same symbols as those in FIG. 2 are the same elements, a description thereof will be omitted. In the figure, for example, thick silicon oxide films 17, 17' are selectively formed on the main upper surface of a P-type silicon substrate 10, and these oxide films 17, 1
A source diffusion layer 11 and a drain diffusion layer 12 are formed in a portion where 7' is not formed to be shallower than the thickness of the oxide films 17 and 17'. Next, in order to control the threshold voltage of the active MOS to be low, the oxide film 17' used as a gate is etched, and a game electrode 16 is formed on this etched portion by, for example, aluminum vapor deposition. Thereafter, a MOS type transistor is completed according to a normal MOS manufacturing process.
このような構成によれば、ホトダイオード１
（第１図参照）に外部光が照射されると、ソース
拡散層１１から流出した電荷は、ドレイン拡散層
１２へ到達するにはこれらの拡散層１１，１２よ
りも膜厚の厚い酸化膜１７′が存在するために到
達しにくくなり、その分の電荷が基板１０から外
部に流出することになり、この流出量分だけブル
ーミングを抑制することができる。 According to such a configuration, the photodiode 1
(See FIG. 1), when external light is irradiated, the charges flowing out from the source diffusion layer 11 must pass through the oxide film 17, which is thicker than the diffusion layers 11 and 12, in order to reach the drain diffusion layer 12. Because of the presence of ', it becomes difficult to reach, and the corresponding amount of charge flows out from the substrate 10, and blooming can be suppressed by the amount of this flow.
第４図は本発明による固体撮像素子に係わる画
素の他の実施例を説明するための要部拡大断面図
であり、第３図と同記号は同一要素となるのでそ
の説明は省略する。同図において、第３図と異な
る点は、シリコン基板１０のゲート酸化膜１７′
の直下に高不純物濃度層１８を設けたものであ
る。 FIG. 4 is an enlarged sectional view of a main part for explaining another embodiment of a pixel related to a solid-state image sensor according to the present invention, and since the same symbols as in FIG. 3 are the same elements, the explanation thereof will be omitted. In this figure, the difference from FIG. 3 is that the gate oxide film 17' of the silicon substrate 10 is
A high impurity concentration layer 18 is provided directly below.
このような構成によれば、ソース拡散層１１か
らドレイン拡散層１２方向に流出する電荷に対し
てバリア効果がさらに大きくなるので、ブルーミ
ングの発生をさらに抑制することができる。 According to such a configuration, the barrier effect against charges flowing from the source diffusion layer 11 toward the drain diffusion layer 12 is further increased, so that the occurrence of blooming can be further suppressed.
以上説明したように本発明による固体撮像素子
によれば、ブルーミングの発生を抑制することが
できるので、高品位の撮像画像が得られる極めて
優れた効果が得られる。 As explained above, according to the solid-state imaging device according to the present invention, the occurrence of blooming can be suppressed, so that an extremely excellent effect of obtaining a high-quality captured image can be obtained.
第１図はMOS型固体撮像素子の一例を示す要
部構成図、第２図は第１図の画素を示す要部拡大
断面図、第３図は本発明に係わる固体撮像素子の
画素の一実施例を示す要部拡大断面図、第４図は
本発明による固体撮像素子の画素の他の実施例を
示す要部拡大断面図である。
１０……基板、１１……ソース拡散層、２……
ドレイン拡散層、１３……絶縁層、１４……酸化
膜、１５……ドレイン電極、１６……ゲート電
極、１７，１７′……酸化膜、１８……高不純物
濃度層。
FIG. 1 is a configuration diagram of essential parts showing an example of a MOS type solid-state image sensor, FIG. 2 is an enlarged sectional view of main parts showing the pixel in FIG. 1, and FIG. FIG. 4 is an enlarged cross-sectional view of a main part showing another embodiment of a pixel of a solid-state image sensor according to the present invention. 10...Substrate, 11...Source diffusion layer, 2...
Drain diffusion layer, 13... Insulating layer, 14... Oxide film, 15... Drain electrode, 16... Gate electrode, 17, 17'... Oxide film, 18... High impurity concentration layer.
Claims (1)
オトダイオードとして働く第２導電型のソース拡
散層１１と、信号出力部として働く第２導電型の
ドレイン拡散層１２と、上記ソース及びドレイン
拡散層１１，１２間の基板表面上にゲート絶縁膜
１７′を介して形成され上記両拡散層１１，１２
間の導電率をスイツチング制御するためのゲート
電極１６とを具備して成り、上記ゲート絶縁膜１
７′を上記ソース、ドレイン拡散層１１，１２よ
りも深く上記半導体基板に埋没させて成ることを
特徴とする固体撮像素子。1 A semiconductor substrate 10 of a first conductivity type, a source diffusion layer 11 of a second conductivity type that functions as a photodiode of a light receiving section, a drain diffusion layer 12 of a second conductivity type that functions as a signal output section, and the source and drain diffusions described above. Both diffusion layers 11 and 12 are formed on the substrate surface between the layers 11 and 12 with a gate insulating film 17' interposed therebetween.
and a gate electrode 16 for switching and controlling the conductivity between the gate insulating film 1 and the gate insulating film 1.
7' is buried in the semiconductor substrate deeper than the source and drain diffusion layers 11 and 12.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8508280A JPS5710985A (en) | 1980-06-25 | 1980-06-25 | Solid image pickup element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8508280A JPS5710985A (en) | 1980-06-25 | 1980-06-25 | Solid image pickup element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5710985A JPS5710985A (en) | 1982-01-20 |
| JPS6229913B2 true JPS6229913B2 (en) | 1987-06-29 |
Family
ID=13848680
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8508280A Granted JPS5710985A (en) | 1980-06-25 | 1980-06-25 | Solid image pickup element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5710985A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0671071B2 (en) * | 1984-09-27 | 1994-09-07 | 松下電子工業株式会社 | Solid-state image sensor |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5665577A (en) * | 1979-11-01 | 1981-06-03 | Nec Corp | Solidstate image sensor |
-
1980
- 1980-06-25 JP JP8508280A patent/JPS5710985A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5665577A (en) * | 1979-11-01 | 1981-06-03 | Nec Corp | Solidstate image sensor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5710985A (en) | 1982-01-20 |
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