JPS62298122A - Manufacture of semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To markedly cut down the manufacturing cost of semiconductor integrated circuit by a method wherein power supply pads of acceptable pellets are connected with one another in a wafer state while being supplied with power. CONSTITUTION:Each pellet 1a of semiconductor wafers 1 is probeinspected to make out data by selecting acceptable pellets. The overall surface of a passivation film 3, after forming Al film, is coated with resist. The resist is patterned into specified shape by electron beams conforming to said data. The Al film is etched using the resist as a mask so that an interconnection pattern 4 may be formed to connect power supply pads 2a, 2b of acceptable pellets 1a with one another. Through these procedures, the power supply pads 2a, 2b of all acceptable pellets 1a can be aged through the interconnection pattern while being supplied with power.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor integrated circuit device, and particularly relates to a technique effective when applied to aging of a semiconductor integrated circuit device. It is something.

[Conventional technology]

In the manufacturing process of semiconductor integrated circuit devices such as LSI,
Usually, after assembling a semiconductor integrated circuit device, aging (
(accelerated life test), and semiconductor integrated circuit devices that exhibit initial failure are excluded as defective products. For testing on the reliability of semiconductor integrated circuit devices, see Nikkei Electronics 4 19 published by Nikkei McGraw-Hill.
It is described in the July 16, 1984 issue, pages 221-228.

The present inventor has studied this aging.

Although the following is not a publicly known technique, it is a technique studied by the present inventor, and its outline is as follows.

That is, first, semiconductor integrated circuit devices are simultaneously fabricated on each of a large number of pellets on a wafer, and after the wiring process is completed, a probe test is performed on the wafer to select good pellets. Next, the wafer is diced and cut into pellets, and then the good pellets are used for assembly. Next, a primary selection is performed by inspecting the electrical characteristics of all the assembled semiconductor integrated circuit devices. Next, the good semiconductor integrated circuit devices left after this primary sorting are aged, and defective semiconductor integrated circuit devices that have deteriorated are excluded.

Thereafter, a final selection is performed to finally obtain a semiconductor integrated circuit device of good quality.

[Problem that the invention seeks to solve]

However, when aging is performed after assembling a semiconductor integrated circuit device as described above, it is also necessary to assemble defective semiconductor integrated circuit devices that deteriorate due to aging, which reduces the manufacturing cost of the semiconductor integrated circuit device. The problem is that it gets expensive. Furthermore, since aging is performed in an assembled state of the semiconductor integrated circuit device, there are problems in that the aging device becomes large and the aging processing capacity is limited.

An object of the present invention is to provide a technique that can reduce manufacturing costs of semiconductor integrated circuit devices.

Another object of the present invention is to provide a technique that allows the aging device to be miniaturized.

Another object of the present invention is to provide a technique that can significantly improve aging processing capacity.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for solving problems]

The present inventor has devised the present invention by paying attention to the fact that most of the causes of deterioration due to aging are in the manufacturing process prior to the assembly process of a semiconductor integrated circuit device.

Outline of typical inventions disclosed in this application is as follows.

That is, in the wafer state, at least the power supply pads of good pellets are connected to each other, and aging is performed in the wafer state while supplying power to the power supply pads.

[For production]

According to the above-mentioned method, aging can be performed in the wafer state, so it is only necessary to assemble semiconductor integrated circuit devices that have not deteriorated due to this knee song, and therefore, the manufacturing cost of semiconductor integrated circuit devices can be significantly reduced. can do.

Furthermore, the aging device can be downsized and the aging processing capacity can be significantly improved.

〔Example〕

Hereinafter, the configuration of the present invention will be described based on one embodiment with reference to the drawings.

In addition, in all the figures, parts having the same functions are given the same reference numerals, and repeated explanations thereof will be omitted.

As shown in FIG. 1, a semiconductor integrated circuit device is simultaneously fabricated on each pellet 1a of a semiconductor wafer 1 such as a silicon wafer, and its wiring (not shown), a pair of power supply pads 2a, 2b, and other bonding. After forming a pad (not shown) on each pellet 1a, a passivation film 3 is formed on the entire surface. Note that, for example, a power supply voltage v0° is applied to the power supply pad 2a, and the power supply pad 2b has a ground potential. Next, this passivation film 3
A predetermined portion of the power supply pad 2a is removed by etching.
, 2b and other bonding pads are exposed.

Next, in this state, a probe test is performed for each pellet 1a of the semiconductor wafer 1 to select non-defective pellets. In this example, the pellet 1a marked with an X in FIG.
Suppose that is a defective pellet. Next, after forming, for example, an A1 film on the entire surface of the passivation film 3, a resist is applied on the Al film. Next, the address data of the good pellets la on the semiconductor wafer 1 is inputted into, for example, an electron beam direct drawing device, and the resist is patterned into a predetermined shape using an electron beam based on this data. Next, by etching the A1 film using this patterned resist as a mask, a good pellet 1 is etched.
f of a! ! ! A wiring pattern 4 is formed to interconnect the pads 2a and 2b. Note that since a large number of power supply pads 2a, 2b are usually provided around each pellet 1a, one of these power supply pads 2a, 2b located at an optimal position is used. Further, reference numerals 4a and 4b are electrodes for supplying power to the power supply pads 2a and 2b from the outside through the wiring pattern 4. For example, the electrode 4a is supplied with a power supply voltage ■. C is applied, and the electrode 4b becomes the ground potential.

Next, in this state, the semiconductor wafer 1 is stood on the aging substrate 5 as shown in FIG. 2, and placed in an aging device to perform a predetermined knee song. During this knee song,
The electrodes 4a, 4b are connected to a predetermined power supply, and while power is supplied to the power supply pads 2a, 2b of all non-defective pellets 1a through the wiring pattern 4, the temperature is set at a predetermined temperature higher than the normal operating temperature of the semiconductor integrated circuit device. Hold at temperature.

After this aging is completed, a probe test is performed again to select good pellets 1a whose properties have not deteriorated due to the aging. In this case, since the knee song can be performed in the state of the semiconductor wafer 1, the aging apparatus can be downsized and the aging processing capacity can be greatly improved.

Next, the semiconductor wafer 1 is diced along the scribe lines 1b and cut into pellets 1a, and then assembled using the good pellets 1a.

This eliminates the need to assemble defective pellets 1a that have deteriorated due to aging.

It is possible to significantly reduce the manufacturing cost of semiconductor integrated circuit devices. Note that since the wiring pattern 4 is also cut during the dicing, this wiring pattern 4 will not cause any trouble later.

Next, after assembly is performed using the non-defective pellets 1a, the semiconductor integrated circuit devices are sorted, and finally non-defective semiconductor integrated circuit devices are obtained.

As above, the invention made by the present inventor has been specifically explained based on the above embodiments, but the present invention is not limited to the above embodiments, and it goes without saying that various modifications can be made without departing from the gist of the invention. It is.

For example, in the above embodiment, the power supply pad 2a of the good pellet 1a selected by the first probe test,
Although only the wiring patterns 2b are connected to each other by the wiring pattern 4, the power supply pads 2a and 2b of all the pellets 1a including defective pellets may be connected to each other by the wiring pattern 4 if necessary. , the present invention can be applied to the manufacture of various semiconductor integrated circuit devices.

〔Effect of the invention〕

Among the inventions disclosed in this application, the effects obtained by typical inventions are briefly described below.

That is, the manufacturing cost of the semiconductor integrated circuit device can be significantly reduced. Furthermore, the aging device can be downsized and the aging processing capacity can be significantly improved.

[Brief explanation of drawings]

FIG. 1 is a plan view for explaining a method of manufacturing a semiconductor integrated circuit device according to an embodiment of the present invention. FIG. 2 is a cross-sectional view for explaining a method of aging a semiconductor wafer. In the figure, 1... semiconductor wafer, 1a... pellet,
2a, 2b...power supply pad, 3...passivation film, 4...wiring pattern, 5...aging board.

Claims (1)

[Scope of Claims] 1. A method for manufacturing a semiconductor integrated circuit device in which the semiconductor integrated circuit device is aged, the method comprising: interconnecting at least power pads of good pellets in a wafer state; A method for manufacturing a semiconductor integrated circuit device, characterized in that the aging is performed in the wafer state while power is supplied. 2. The semiconductor integrated circuit device according to claim 1, wherein the power supply pads of the non-defective pellets are connected to each other according to address data of the non-defective pellets on the wafer. manufacturing method. 3. Claim 1, characterized in that the power supply pads of all the pellets of the wafer are interconnected.
A method for manufacturing a semiconductor integrated circuit device according to item 1 or 2.