JPS62293667A - Semiconductor memory - Google Patents

Semiconductor memory

Info

Publication number
JPS62293667A
JPS62293667A JP13655886A JP13655886A JPS62293667A JP S62293667 A JPS62293667 A JP S62293667A JP 13655886 A JP13655886 A JP 13655886A JP 13655886 A JP13655886 A JP 13655886A JP S62293667 A JPS62293667 A JP S62293667A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
layer
electrode
formed
dielectric
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13655886A
Other versions
JP2702702B2 (en )
Inventor
Michihiro Inoue
Toshiro Yamada
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H01L27/108Dynamic random access memory structures
    • H01L27/10805Dynamic random access memory structures with one-transistor one-capacitor memory cells
    • H01L27/10829Dynamic random access memory structures with one-transistor one-capacitor memory cells the capacitor being in a substrate trench

Abstract

PURPOSE:To implement low resistance in an electrode and to prevent impurity contamination of a dielectric layer, by forming a three-layer structure comprising a polysilicon layer, a low resistance layer and a polysilicon layer for the fixed electrode of a storage capacitor. CONSTITUTION:A diffused layer 12, which is to become one electrode of a storage capacitor, is formed on the side surface of a groove 20 formed in a substrate 1. A dielectric layer 17 made of SiO2 and the like is formed thereon. On the dielectric layer 17, a polysilicon layer 30, which is to become another electrode, a low resistance layer formed by ion implantation and a polysilicon layer 32 are formed. Then, a fixed electrode having a three-layer structure is formed. Thus, the low resistance of the electrode itself can be implemented without impurity contamination in the dielectric layer.
JP13655886A 1986-06-12 1986-06-12 A semiconductor memory device Expired - Lifetime JP2702702B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13655886A JP2702702B2 (en) 1986-06-12 1986-06-12 A semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13655886A JP2702702B2 (en) 1986-06-12 1986-06-12 A semiconductor memory device

Publications (2)

Publication Number Publication Date
JPS62293667A true true JPS62293667A (en) 1987-12-21
JP2702702B2 JP2702702B2 (en) 1998-01-26

Family

ID=15178037

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13655886A Expired - Lifetime JP2702702B2 (en) 1986-06-12 1986-06-12 A semiconductor memory device

Country Status (1)

Country Link
JP (1) JP2702702B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4954927A (en) * 1988-09-16 1990-09-04 Samsung Electronics Co., Ltd. Double capacitor and manufacturing method thereof
US5077232A (en) * 1989-11-20 1991-12-31 Samsung Electronics Co., Ltd. Method of making stacked capacitor DRAM cells
WO2007069292A1 (en) * 2005-12-12 2007-06-21 Fujitsu Limited Semiconductor device and method of manufacturing the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61263265A (en) * 1985-05-17 1986-11-21 Matsushita Electronics Corp Manufacture of semiconductor device
JPS62266865A (en) * 1986-05-15 1987-11-19 Hitachi Ltd Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61263265A (en) * 1985-05-17 1986-11-21 Matsushita Electronics Corp Manufacture of semiconductor device
JPS62266865A (en) * 1986-05-15 1987-11-19 Hitachi Ltd Semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4954927A (en) * 1988-09-16 1990-09-04 Samsung Electronics Co., Ltd. Double capacitor and manufacturing method thereof
US5077232A (en) * 1989-11-20 1991-12-31 Samsung Electronics Co., Ltd. Method of making stacked capacitor DRAM cells
WO2007069292A1 (en) * 2005-12-12 2007-06-21 Fujitsu Limited Semiconductor device and method of manufacturing the same
US7928515B2 (en) * 2005-12-12 2011-04-19 Fujitsu Semiconductor Limited Semiconductor device and manufacturing method of the semiconductor device
CN101326632B (en) 2005-12-12 2012-02-15 富士通半导体股份有限公司 Semiconductor device and manufacturing method thereof
JP4946870B2 (en) * 2005-12-12 2012-06-06 富士通セミコンダクター株式会社 Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date Type
JP2702702B2 (en) 1998-01-26 grant

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term