JPS6229163A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To enable high density and high integration by using a direct contact structure consisting of an impurity region by arsenic doping and a polycrystalline silicon wiring layer by phosphorus doping, thereby shortening the distance between the transistor portion and the direct contact portion. CONSTITUTION:A thermal oxide film 2 is formed on the surface of a P-type monocrystalline silicon substrate 1, and a resist pattern 3 is formed. After the subsequent opening of a direct contact hole through selective etching, arsenic ion implantation 6 is performed. Then, upon the applying of thermal treatment after removing the resist pattern and depositing a molybdenum film 8, the silicification reaction of molybdenum proceeds in the direct contact hole portion where the silicon substrate 1 and the molybdenum film 8 are in contact with each other, thereby forming a molybdenum silicide layer 9. Simultaneously from an arsenic ion implantation layer 7 arsenic diffuses to be activated, thereby forming an N<+> region 10 under the silicide layer 9. Then, after removing the unreacted molybdenum film 8 and depositing a polycrystalline silicon layer 4, with POCl3 as a diffusion source phosphorus is diffused, thereby making the device low resistant.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to improvements in a semiconductor device having a direct contact structure and a method for manufacturing the same.

[Technical background of the invention]

2. Description of the Related Art In semiconductor devices such as ICs, a direct contact structure between an impurity region formed in a semiconductor substrate and a wiring layer is widely adopted. This direct contact mill structure is conventionally formed in a wide manner.

First, a thermal oxide film 2 is formed on the surface of a P-type wheel crystal silicon substrate 1, and then a photoresist 3 is applied thereon, exposed, and developed. A direct contact portion is opened by etching (as shown in FIG. 2(A)).

Next, after removing the resist pattern 3, a polycrystalline silicon layer 4 is deposited, and POC is applied from above the polycrystalline silicon layer.
Phosphorus is doped using nq as a diffusion source. As a result, the resistance of the polycrystalline silicon layer 4 used for wiring is sufficiently reduced, and phosphorus is also diffused into the silicon substrate 1 in the die reflex 1 to 299 to 299 parts, resulting in N+ type phosphorus in direct contact with the polycrystalline silicon 1ii4. A mold thin member 5 is formed (as shown in FIG. 2(B)). Note that a transistor (not shown) is formed near the direct contact portion.

As described above, the conventional direct contact structure is constructed by direct contact between an N-type impurity region formed by phosphorus diffusion and a polycrystalline silicon wiring layer.

[Problems with back circle technology]

In conventional semiconductor devices, when forming a direct contact structure, phosphorus is diffused into a single crystal silicon substrate through a direct contact hole having a large diffusion coefficient, which causes the following problems.

That is, a transistor exists near the direct contact portion, and in order to achieve high density and high integration, it is necessary to shorten the distance between them as much as possible.

However, since a margin is required for the increased diffusion length of the impurity region that makes up the direct contact, in the conventional V4 structure, the distance between the direct contact part and the transistor part has to be long. This is a factor that hinders the increase in density.

In addition, using arsenic with a small diffusion coefficient,
Even if the N+ type impurity region 5 is formed, phosphorus is then diffused into the silicon substrate in order to lower the resistance of the polycrystalline silicon layer 4.
The use of arsenic to form the N+ type element region 5 becomes completely meaningless.

[Purpose of explanation]

The present invention has been made in view of the above circumstances, and includes a direct contact structure composed of an arsenic-doped impurity wA region and a phosphorous-doped polycrystalline silicon wiring layer, and has a direct contact structure that connects a transistor part and a direct contact part. The present invention provides a semiconductor device that enables high density and high integration by shortening the distance between semiconductor devices, and a method for manufacturing the same.

(Summary of the Invention) A semiconductor device according to the present invention includes an insulating film formed on the inner surface of P-type silicon, a direct contact hole opened in the insulating film, and arsenic introduced into the P-type silicon layer from the direct contact hole. an N-type impurity region doped with phosphorus, a metal silicide layer formed on the surface of the N-type impurity region, and a metal silicide layer extending over the insulating film in contact with the metal silicide layer; It is characterized by comprising a polycrystalline silicon wiring layer whose resistance has been lowered by doping.

The method for manufacturing a semiconductor device according to the present invention also includes the steps of forming an insulating film on the surface of a P-type silicon layer, forming a direct contact hole in the insulating film by photolithography, and introducing arsenic into the insulating film through the direct contact hole. The step of implanting ions into the P-type silicon layer and depositing a metal film and heat treatment activate the previously implanted arsenic to form the N-type nanoparticle #84 region, and at the same time, the direct contact opening is A step of forming a metal silicide layer by selectively causing a silicide reaction only on the surface, and depositing a polycrystalline silicon layer after removing the unreacted metal film, and doping the polycrystalline silicon layer with phosphorus. By lowering the resistance by
The method is characterized by comprising a step of forming a direct contact wiring layer for the N-type impurity region.

In the semiconductor device of the present invention, N under the direct contact
Mold child ill! The material region is formed of arsenic doped with a small diffusion coefficient, and phosphorus in the polycrystalline silicon layer is blocked by the metal silicide layer and does not diffuse into the single crystal silicon. Therefore, the diffusion length of the N-type region under the direct contact can be controlled to be shorter than that in the conventional case, and the distance to the transistor portion can be reduced to achieve higher density and higher integration.

Further, according to the manufacturing method of the present invention, it is possible to lower the resistance of the polycrystalline silicon layer by doping phosphorus without affecting the N-type impurity region doped with arsenic under the direct contact. Since the diffusion of phosphorus is excellent in uniformity, it is suitable as an impurity for lowering the resistance value of the direct contact 1 to the hole wire, and its ability to coexist with under-contact diffusion by arsenic is extremely significant.

[Miura example of invention]

Hereinafter, one embodiment of the present invention will be described with reference to FIGS. 1(A) to 1(D).

(2) First, a thermal oxide film 2 is formed on the surface of a P-type wheel crystal silicon substrate 1, and a resist pattern 3 is formed by applying a photoresist sample, exposing it to light, and developing it. Subsequently, direct contacts 1 to holes are opened by selective etching using the resist pattern 3 as a mask, and then arsenic ion implantation 6 is performed using the resist pattern 3 as a blocking mask (as shown in FIG. 57(A)). In the figure, 7 indicates an arsenic ion implantation layer.

As shown, the molybdenum film 8 is in contact with the silicon substrate 1 through the direct contact hole, and the arsenic ion implantation layer 7 is present in the contact portion.

■ Next, heat treatment is performed in this state. As a result, the silicidation reaction of molybdenum progresses in the direct contact hole portion where the silicon substrate 1 and molybdenum 18 are in contact, and molybdenum silicide l! 19 is formed. At the same time, arsenic is diffused from the arsenic ion-implanted layer 7 and activated (
phenomenon called "snowplow"), silicide layer 9
An N+ type region 10 is formed below (as shown in FIG. 1(C)). Naturally, the above silicification reaction does not occur in the portion where the thermal oxide film 2 is interposed between the molybdenum film 8 and the silicon substrate.

(2) Next, after removing the unreacted molybdenum film 8 and depositing the polycrystalline silicon layer 4, POC is added to the polycrystalline silicon 1.
The resistance is lowered by diffusing phosphorus using ga as a diffusion source (as shown in FIG. 1(D)).

At this time, diffusion of phosphorus into the silicon substrate 1 is prevented by the molybdenum silicate layer.

N-type 11 formed by arsenic doping as described above
10, a direct contact structure consisting of a polycrystalline silicon wiring layer whose resistance is lowered by doping with phosphorus is obtained.

Moreover, since phosphorus in the polycrystalline silicon layer 4 is prevented from diffusing into the silicon substrate 1 by the molybdenum silicide layer 9 and the thermal oxide film 2, the N-type region 1a10 under direct contact is prevented from diffusing into the silicon substrate 1.
It is possible to simultaneously achieve shortening of the diffusion length of phosphorus and uniformly lowering the resistance of the polycrystalline silicon wiring layer by phosphorus diffusion.

Therefore, according to the semiconductor device of the above embodiment, the distance between the direct contact portion and the nearby transistor portion can be reduced, and the device can be highly densified and highly integrated.

(Effects of the Invention) As detailed above, according to the present invention, the resistance of the direct contact wiring layer made of a polycrystalline silicon layer is reduced by doping with phosphorus, which has excellent diffusion uniformity, and the N-type impurity under the direct contact is reduced. By forming the region with arsenic doped with a small diffusion coefficient, remarkable effects can be obtained, such as shortening the distance between the transistor part and the direct contact part, making it possible to increase the density and integration of semiconductor devices. It is.

[Brief explanation of the drawing]

FIG. 1 is a sectional view sequentially showing the manufacturing process of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a sectional view showing the manufacturing process of a conventional semiconductor device. 1... P-type car crystal silicon substrate, 2... Thermal oxide film,
3... Resist pattern, 4... Polycrystalline silicon layer, 5... Phosphorus-doped N-type diffusion layer, 6... Arsenic ion implantation, 7... Arsenic ion implantation layer, 8... Molybdenum film, 9...Molybdenum silicide layer, 10...Arsenic-doped N-type diffusion layer. Applicant's agent Patent attorney Takehiko Suzue Figure 1

Claims (4)

[Claims] (1) An insulating film formed on the surface of a P-type silicon layer, a direct contact hole opened in the insulating film, and an N-type formed by doping arsenic into the P-type silicon layer from the direct contact hole. an impurity region, a metal silicide layer formed on the surface layer of the N-type impurity region, and a polycrystalline layer extending over the insulating film in contact with the metal silicide layer and having a low resistance due to phosphorus doping. A semiconductor device characterized by comprising a silicon wiring layer. (2) The semiconductor device according to claim (1), wherein the metal silicide layer is a molybdenum silicide layer. (3) A step of forming an insulating film on the surface of the P-type silicon layer, forming a direct contact hole in the insulating film by photolithography, and a step of ion-implanting arsenic into the P-type silicon layer through the direct contact hole. Then, by depositing a metal film and subjecting it to heat treatment, the previously implanted arsenic is activated to form an N-type impurity region, and at the same time, a silicidation reaction is selectively caused only on the surface of the direct contact opening. By forming a metal silicide layer, depositing a polycrystalline silicon layer after removing the unreacted metal film, and doping the polycrystalline silicon layer with phosphorus to lower the resistance, the N-type 1. A method of manufacturing a semiconductor device, comprising the step of forming a direct contact wiring layer for an impurity region. (4) The method for manufacturing a semiconductor device according to claim (3), wherein a molybdenum film is used as the metal film.