JPS62291209A - Current mirror circuit - Google Patents

Abstract

PURPOSE:To remove the influence of an early effect by inserting a transistor to fix the collector electric potential of the load side transistor of a current mirror circuit tetween the collector and the load. CONSTITUTION:The collector electric current of a reference side transistor 11 is fixed to the electric current value of a reference electric current source 12 by the feedback loop composed of transistors 73 and 14 and a transistor 15 connected to the diode. Between the collector of transistors 17 and 18 at the load side and loads 21 and 22, transistors 19 and 20 are inserted. Since the base of the transistors 19 and 20 is connected through the diode-connected transistor 15 to the base of the reference side transistor 11, the emitter of the transistor 11, namely, the collector electric potential of the load side transistors 17 and 18 is fixed to the voltage lower by an electric power source VCC or VBE (base and emitter voltage) only.

Description

[Detailed Description of the Invention] 3. Detailed Description of the Invention [Object of the Invention] (Industrial Application Field) - This invention is based on i1! This is a current mirror circuit that outputs a current proportional to the value of a current source, and is designed to prevent variations in the output current value caused by differences in voltage between the collector and emitter of the transistors that make up the circuit. be.

(Prior Art) As a current mirror circuit, the one shown in FIG. 3 is well known. Although a PNP transistor is used in this circuit, it is also possible to use an NPN transistor, and the transistor 51 whose collector and base are connected is driven by a constant current from a reference current source 52 having a value of l ref. There is. Further, the bases of current mirror current output transistors 53 and 54 are commonly connected to the transistor 51, and load circuits 55 and 56 are connected to the collectors of each transistor. As the load circuits 55 and 56, a resistor or an NPN transistor whose base and collector are short-circuited and connected as a diode can be considered.

In the conventional circuit described above, when a resistor is used as the load circuit 55 or 56, the collector potential of the output transistor 53 or 54 is given by the product of the current mirror current value and the value of the load resistor. On the other hand, when a diode-connected NPN transistor is used as the load circuit 55 or 56, the collector potential of the transistor 53 or 54 is not strongly related to the current mirror current value, and the potential between the base and emitter of the load transistor is Determined by voltage VBE.

Next, the characteristics of the above conventional circuit will be analyzed in detail.

First, it is assumed that the current amplification factor hre of each transistor is sufficiently large and that no error occurs due to the base current. In addition, the collector areas of each transistor are set equal, and the reference current a5 from transistors 53 and 54 is
It is assumed that a current 1 rer equal to the value of 2 is output. Under such conditions, it is assumed that a resistor is used as the load circuit 55 connected to the transistor 53, and a diode-connected transistor is used as the load circuit 56 connected to the transistor 54.

At this time, the collector potential of the transistor 53 is determined by the product of the current mirror current WIIrat and the value of the load resistance, as described above. Further, the collector potential of the transistor 54 is determined by VT Qn (Irer, 'Is). However, VT is approximately 26mV at 300'K.
, and Is is the saturation current of the transistor. The collector potential of the l~ transistor 54 given by the above value is logarithmically compressed with respect to changes in lrer, so that it becomes approximately constant. Therefore, the current mirror output current of transistor 54 is not affected by the Early effect.

However, since a resistor is used as the load circuit 55 on the transistor 53 side, the collector potential of the transistor 53 changes depending on the resistance value. It is known that when the collector potential changes, the collector current also changes accordingly.

Figure 4 is a diagram showing the general static characteristics of a transistor, where the horizontal axis shows the voltage between the collector and emitter of the transistor.
'CE is plotted on the vertical axis, and collector current I0 is plotted on the vertical axis. In this characteristic diagram, when the collector-emitter voltage VCE changes from VCEl to VCE2, the collector current IC also changes from Ic1 to Ic2. Further, in this characteristic diagram, the early voltage is given by the value of VCE, i.e., -vA, which is obtained by extending the straight line portion of the static characteristic curve in the negative direction of the collector-emitter voltage Vcε and intersecting at Ic=O. Here, if a transistor with a low absolute value of this early voltage -VA is used, the slope of the straight line part of the static characteristic curve becomes large, so
The collector current 1c changes greatly in response to a slight change in the collector-emitter voltage VCE.

Therefore, in the conventional circuit described above, when a resistive load is used as a load circuit, there is a drawback that the value of the current mirror output current varies greatly due to the influence of the Early effect of the output transistor. Such variations in the value of the output current become particularly noticeable when a PNP transistor with a large Early effect is used.

(Problems to be Solved by the Invention) As described above, the conventional circuit has a drawback in that the current mirror output current value varies significantly due to the Early effect of the transistor.

This invention was made in consideration of the above-mentioned circumstances, and its purpose is to eliminate the influence of the early effect of the transistor, thereby eliminating the variation in the current mirror output current value based on the load. The purpose is to provide a mirror circuit.

[Structure of the Invention (Means for Solving Problems)] A current mirror circuit of the present invention includes a first transistor of a first polarity whose emitter is connected to a first potential, and a collector of the first transistor. a reference current source connected between and a second potential, and an emitter connected to the first potential;
a second polarity transistor having a base connected to the collector of the first transistor, and a second polarity transistor having a base connected to the collector of the second transistor and an emitter connected to the second potential; a third transistor, a potential lower means connected to the base of the first transistor and the collector of the third transistor to cause a constant potential drop; and an emitter connected to the first potential. , a fourth transistor of a first polarity whose base is connected to the base of the first transistor;
and a fifth transistor of the first polarity, the emitter of which is connected to the collector of the fourth transistor, the base of which is connected to the collector of the third transistor, and the collector of which serves as a current output terminal.

(Function) In the current mirror circuit of the present invention, the collector potential of the first transistor is fixed to the base-emitter voltage of the second transistor by the second and third transistors and the potential drop means. Furthermore, by connecting the base of the fourth transistor to the base of the second transistor, the collector current of this fourth transistor is made equal to the reference current source. Furthermore, the voltage between the collector and emitter of the fourth transistor is calculated from the sum of the voltage between the base and emitter of this fourth transistor and the voltage dropped by the potential drop means.
It is fixed at the value obtained by subtracting the Jffi pressure.

(Example) Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a circuit diagram showing the configuration of an embodiment of a current mirror circuit according to the present invention. In the figure, the emitter of PNP transistor 11 is connected to high potential Vcc. A reference current [12 of a constant current 1111ref is connected between the collector of this transistor 11 and the low potential V99. Further, the emitter of the PNP transistor 13 is connected to the high potential Vcc. This transistor 1
The base of the transistor 3 is connected to the collector of the transistor 11, and the collector is connected to the base of the NPN transistor 14.

The emitter of the transistor 14 is connected to the low potential V98, and the collector is connected to the collector of the PNP transistor 15. Further, a capacitor 16 is connected between the base and collector of the transistor 14.

The transistor 15 is diode-connected with its base and collector short-circuited, and its emitter is connected to the base of the transistor 11.

Furthermore, the emitters of two PNP transistors 17 and 18 for current mirror current output are connected to the high potential Vcc. And each of the above transistors 17
．． The base of transistor 18 is commonly connected to the base of transistor 11. In addition, both the transistors 17.1
The collector of 8 is connected to the emitter of each PNPt transistor 19.20. Both transistors 1 above
The bases of 9.20 are commonly connected to the collector of the transistor 14. Load circuits 21 and 22 are connected between the respective collectors of the transistors 19 and 20 and the low potential VSS.

The transistors 13, 14 and 15 constitute a negative feedback loop that provides negative feedback from the collector side to the base side of the transistor 11, and the capacitor 16 is provided to prevent activation in this negative feedback loop. It is being In addition, the above customer transistors 11.13.15.
17, 18, 19, and 20 are all assumed to have the same characteristics.

In such a configuration, it is assumed that the collector potential of the transistor 11 is now lowered from a certain potential.

As a result, the base K El of the transistor 13 increases, and the collector current of the transistor 13 also increases accordingly. The collector current of this transistor 13 is supplied as the base current of the transistor 14.

As a result, the collector current of this transistor 14 also increases. Due to the increase in the collector current of the transistor 14,
The base current of transistor 11 increases, which causes its collector current to increase. Therefore, the collector potential of the transistor 11, which initially decreased from a certain potential, increases. On the contrary, when the collector potential of the transistor 11 increases from a certain potential, the collector potential of the transistor 11 decreases. In this way, transistor 11
is controlled by the negative feedback loop so that the collector potential of is always constant. Here, since the base and emitter of the transistor 13 are connected between the collector and emitter of the transistor 11, the collector-emitter voltage VCE (11) of the transistor 11 is the base-emitter voltage VIE of the transistor 13. (13) is fixed.

Further, since the reference current source 12 is connected to the collector of the transistor 11, the collector current of the transistor 11 is set to the value 1 ref of the reference current m12.

Furthermore, the collector of the transistor 17 for output.

The emitter voltage VCE (17) is
From the sum of the base-emitter voltage V, E (17) of transistor 1 and the base-emitter voltage VBE<15) of transistor 15, the base-emitter voltage VB of transistor 19 is calculated.
This is the value obtained by subtracting E(19). That is, VCE(1
7) is given by the following formula.

VCE(17) =Ve E (17) +Va E (15) −
Va E (19)... 1 Collector of another output transistor 18.

Similarly, the emitter voltage VCE (18) is given by the following equation.

VCE (18) = Va E (1B) + Va E (15)
Ve t: (20)... 2 Here, transistor 11.13.15.77, 1g,
Since all characteristics of 19°20 are set equal,
Va E (15) - Va E (17) =V
e E (18) = Va E (19) = V8
E (20) =V8 E t'j6t, the right sides of the above equations 1 and 2 are each VIE.

That is, the collectors of transistors 17, 18 no matter what loads are used in the load circuits 21, 22, respectively.

The emitter voltage VCE is fixed at a constant value. Therefore, it is not affected by the Early effect as in conventional circuits. Moreover, the bases of transistors 17 and 18 are
Since they are commonly connected to the bases of transistors 11 through which ref flows, reference current 1 ref similarly flows through each of these transistors 17 and 18.

Next, transistors 11°17 whose bases are commonly connected,
Consider the influence that the base current of 18 has on the current mirror current 1 ref. Now, transistor 17.1
Assume that a total of (n-1) transistors corresponding to 8 are provided. At this time, the transistor 11
All base currents including nle flow to the collector of transistor 14. Therefore, the current nlo seen from the base side of the transistor 14 becomes (nle/hfe), where hre is the current amplification factor of the transistor 14. Furthermore, since the base N current of the transistor 14 is the collector current of the transistor 13, the current (nle/hfe) seen from the base side of the transistor 13 is
If the current amplification factor of 1 to transistor 13 is set to Me, which is equal to that of transistor 14, (n Ia y”nle2
)become.

In other words, the error generated in the current mirror current output from transistors 17, 18, etc. is (n Ie /
hfe2). In general, the current amplification factor h of a transistor is
The value of re is several tens or more for a PNP transistor and several hundred or more for an NPN transistor, so even if a large number of output transistors are provided, the error in the current mirror current 1 ref based on the base current of these transistors is extremely small. can do. On the other hand, in the conventional circuit shown in FIG. 3, as the number of output transistors is increased, the unbalanced error increases at a constant rate.

In this manner, this embodiment circuit can eliminate the influence of the Early effect of the transistor, thereby eliminating variations in the current mirror output current value based on the load. Furthermore, even if the number of output transistors (transistors 17, 18, etc.) is increased, errors in the current mirror current based on the base currents of these transistors can be made extremely small.

FIG. 2 is a circuit diagram showing the configuration of another embodiment of the invention. In this example circuit, the PN of the actual wild goose example circuit shown in FIG.
P transistor 11.13.15.17°18, 19.
20 is an NPN transistor 31.33.35.37°3
8, 39.40, the NPN transistor 14 is replaced with a PNP transistor 34, and the potentials VCC and Vss are accordingly interchanged. As a result, the reference current a32 is changed from a type in which a constant current l ref is poured into it like the reference current source 12 to a type in which it is flowed out, and a change is made so that a current mirror current is drawn from the load circuits 41 and 42. has been done.

Incidentally, the capacitor 36 is provided to prevent the spread in the negative feedback loop composed of the transistors 33, 34 and 35.

It goes without saying that the present invention is not limited to the above-mentioned embodiments, and that various modifications are possible. For example, in each of the above embodiment circuits, the diode-connected transistor 15 or 35 is the transistor 1
Since a constant potential drop is generated between the base of each transistor 1.31 and the collector of each transistor 14.34, a resistor can also be used instead of these transistors. When a resistor is used, the above equations 1 and 2 are rewritten as the following equations 3 and 4.

VCE (17) = Ve E (17) + VR - Vll E (1
9)... 3 VCE (18) = Va E (18) +Vs VB E (2
0)...4 However, VR is a potential drop generated by a resistor in place of the transistor 15.35.

In this case as well, Ve E (17> =VB E (
19> =V8E (t8) -VB E (20
) = VB E Due to the torque, the transistor 37
．． 38 respective collectors.

The base-to-base voltage can be fixed at VR.

[Effects of the Invention] As explained above, the present invention provides a current mirror circuit that can eliminate variations in the current mirror output current value based on the load by eliminating the influence of the Early effect of the transistor. Can be done.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the configuration of an embodiment of the present invention, and FIG.
FIG. 3 is a circuit diagram showing the configuration of another embodiment of the present invention, FIG. 3 is a circuit diagram of a conventional circuit, and FIG. 4 is a static characteristic diagram of a general transistor. 11, 13.15.17.18.19.20...PN
Pt-transistor, 12... reference current source, 14...
NPN transistor, 21, 22...load circuit. Applicant's agent Patent attorney Takehiko Suzue Figure 3 Figure 4

Claims (2)

[Claims] (1) a first transistor of a first polarity whose emitter is connected to a first potential; a reference current source connected between the collector of the first transistor and a second potential; a second transistor of a first polarity, the base of which is connected to the collector of the first transistor, the base of which is connected to the collector of the second transistor, and the emitter of which is connected to the second potential; a third transistor of a second polarity connected thereto; a potential drop means connected between the base of the first transistor and the collector of the third transistor to produce a constant potential drop; a fourth transistor of a first polarity, the base of which is connected to the first potential, the base of which is connected to the base of the first transistor, the emitter of which is connected to the collector of the fourth transistor, and the base of which is connected to the collector of the third transistor; A current mirror circuit comprising: a fifth transistor of a first polarity which is connected to each other and whose collector is a current output terminal. (2) The current mirror circuit according to claim 1, wherein the potential dropping means is constituted by a first polarity transistor whose base and collector are short-circuited.