JPS62289030A - Multiple address control system for electronic exchange - Google Patents

Multiple address control system for electronic exchange

Info

Publication number
JPS62289030A
JPS62289030A JP13254586A JP13254586A JPS62289030A JP S62289030 A JPS62289030 A JP S62289030A JP 13254586 A JP13254586 A JP 13254586A JP 13254586 A JP13254586 A JP 13254586A JP S62289030 A JPS62289030 A JP S62289030A
Authority
JP
Japan
Prior art keywords
control
terminal
multiple address
control device
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13254586A
Other languages
Japanese (ja)
Other versions
JPH0545104B2 (en
Inventor
Shuichi Hashimoto
修一 橋本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP13254586A priority Critical patent/JPS62289030A/en
Publication of JPS62289030A publication Critical patent/JPS62289030A/en
Publication of JPH0545104B2 publication Critical patent/JPH0545104B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE:To attain multiple address information near at the same time with a time difference through a multiple address instruction from a processor by providing a multiple address controller connected to a terminal equipment group via a data link. CONSTITUTION:The multiple address controller 4 receives a synchronizing control instruction from a main processor (MP) 2 via a communication bus 5 and the received instruction is informed to plural terminal controllers 7 via the data link 6 in terms of multiple address. The data link 6 accommodates plural terminal controllers 7 and the multiple address controller 4 to apply eachange connection by the control of the MP 2. The terminal controller 7 is connected at each terminal equipment 8 to control the terminal equipment 8 according to the instruction of a local processor (LP) 1. In the inter-MP exchange processing task, the multiple address control processing is not executed between the MP and Lp processing but executed by the instruction from the MP 2 to the multiple address controller 4. Thus, the multiple address control to the plural terminal controllers 7 is executed by one processing.

Description

【発明の詳細な説明】 発明の詳細な説明 〔産業上の利用分野〕 本発明は、電子交換機の同報制御方式に関し、特にマル
チプロセッサー方式の電子交換機の収容される端末装置
群への同時通報を制御する電子交換機の同報制御方式に
関する。
[Detailed Description of the Invention] Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a broadcast control method for an electronic exchange, and in particular, a method for simultaneously broadcasting to a group of terminal devices accommodated in a multiprocessor type electronic exchange. This invention relates to a broadcast control system for electronic exchanges.

〔従来の技術〕[Conventional technology]

従来の電子交換機の同報制御方式は分散されたプロセッ
サーに分割制御される端末群に対してソフトウェアによ
る疑似制御をしている。ソフトウェアによる疑似制御で
は、全負荷分散プロセッサが同一タスクにより次々と制
御オーダを受信する方法であり、一括処理による同時制
御を行なうが、制御の開始から終了まで処理時間差の分
だけ時差ができる。分散制御マルチプロセッサー方式の
電子交換機はローカルプロセッサ(以後LPという)お
よびメインプロセッサ(以f&M Pという)を有し、
LPが端末制御処理をしMPが交換処理を実行する。L
P内の端末制御処理は通常MPの交換処理結果としての
MP側からの制御指示命令に従って行なわれる。例えば
、複数の端末の同報制御を通常処理で実行する場合、M
Pの交換処理タスクは当該端末制御装置に制御が従属し
ている複数のLPに順次制御指示命令を送出する。この
ような処理では被命令LPの数が多い場合にはLP間で
処理の時間差が発生し、端末群に対する完全な同報制御
とならない。従って、局線中継台への同時着信表示のよ
うな操作上の時間制約が大きい端末装置の場合には従来
の同報制御方式を採用することができない。
The conventional broadcast control system for electronic exchanges uses software to perform pseudo-control over a group of terminals that are divided and controlled by distributed processors. In software-based pseudo control, all load-balanced processors receive control orders one after another for the same task, and simultaneous control is performed through batch processing, but there is a time difference corresponding to the processing time difference from the start to the end of control. A distributed control multiprocessor type electronic exchange has a local processor (hereinafter referred to as LP) and a main processor (hereinafter referred to as f&MP),
The LP performs terminal control processing, and the MP performs exchange processing. L
Terminal control processing within P is normally performed in accordance with control instructions from the MP side as a result of MP exchange processing. For example, when performing broadcast control for multiple terminals in normal processing, M
The exchange processing task of P sequentially sends control instructions to a plurality of LPs whose control is subordinate to the terminal control device. In such processing, when the number of commanded LPs is large, a processing time difference occurs between the LPs, and complete broadcast control for a group of terminals is not achieved. Therefore, the conventional broadcast control method cannot be adopted in the case of a terminal device that has large operational time constraints, such as simultaneous display of incoming calls on a central office relay stand.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の電子交換機の同報制御方式はメインプロ
セッサの交換処理タスクが端末装置を制御する複数のロ
ーカルプロセッサに順次制御指示命令を送出するように
構成されているので、命令されるL Pの数が多い場合
にはL P間で処理の時間差が発生し全端末装置の同時
制御が不可能であり同報制御はできないという問題点が
あった。
The above-mentioned broadcast control method of the conventional electronic switching system is configured such that the switching processing task of the main processor sequentially sends control instruction commands to a plurality of local processors that control terminal devices. When the number of terminals is large, there is a problem that a processing time difference occurs between LPs, making it impossible to control all terminal devices simultaneously and making broadcast control impossible.

本発明の目的は」1記問題点を解決する電子交換機の同
報制御方式を提供することにある。
An object of the present invention is to provide a broadcast control system for an electronic exchange that solves the problem described in item 1 above.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の同報制御方式は、マルチプロセッサー方式の電
子交換機に収容される端末装置群に同時通報する電子交
換機の同報制御方式において、直接接続する端末装置を
制御する端末制御装置と、端末装置の制御を命令すると
共に交換処理を実行する分散方式によるプロセッサーと
、このプロセッサーから直接受信した同報制御命令を接
続中の前記端末制御装置へ一斉に送信する同報制御装置
と、複数の前記端末制御装置および少くとも一つの前記
同報制御装置を収容接続し前記プロセッサーの制御によ
り端末制御装置および同報制御装置の相互接続を交換処
理するデータリンクと、を有する。
The broadcast control method of the present invention is a broadcast control method for an electronic exchange that simultaneously sends notifications to a group of terminal devices housed in a multiprocessor type electronic exchange. a distributed processor that commands the control of the processor and executes exchange processing; a broadcast control device that simultaneously transmits broadcast control commands received directly from the processor to the connected terminal control devices; and a plurality of the terminals. and a data link that accommodates and connects a control device and at least one of the broadcast control devices, and exchanges and processes mutual connections between the terminal control device and the broadcast control device under the control of the processor.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例を示すブロック図である。第
1図にはローカルプロセッサLPI、メインプロセッサ
MP2、中央バス3、同報制御装置4、通信バス5、デ
ータリンク6、端末制御装置7、および端末装置8が示
される。LPlは端末の状態変化を端末制御装置を経由
して制御するプロセッサーであり、交換処理の入出力処
理を行なう。MP2はLPIと中央バス3を介して接続
され、LPlからの交換処理指示に従って交換処理タス
クを実行する(N+1>構成の負荷分散プロセッサーで
ある。同報制御装置4はMP2からの同報制御命令を通
信バス5を介して受信し、受信した命令を更にデータリ
ンク6を介して複数の端末制御装置7へ同報通知する。
FIG. 1 is a block diagram showing one embodiment of the present invention. In FIG. 1, a local processor LPI, a main processor MP2, a central bus 3, a broadcast control device 4, a communication bus 5, a data link 6, a terminal control device 7, and a terminal device 8 are shown. LPl is a processor that controls changes in the status of the terminal via the terminal control device, and performs input/output processing for exchange processing. The MP2 is connected to the LPI via the central bus 3, and executes exchange processing tasks according to exchange processing instructions from the LP1 (N+1> configuration).The broadcast control device 4 executes exchange processing tasks according to exchange processing instructions from the LPI (N+1> configuration). is received via the communication bus 5, and the received command is further broadcasted to a plurality of terminal control devices 7 via the data link 6.

データリンク6は複数の端末制御装置7および同報制御
装W4を収容しMP2の制御により交換接続する。端末
制御装置7は端末装置8ごとに接続され、LPIの命令
に従って端末装置8を制御する。
The data link 6 accommodates a plurality of terminal control devices 7 and a broadcast control device W4, and is exchange-connected under the control of the MP2. The terminal control device 7 is connected to each terminal device 8 and controls the terminal device 8 according to LPI instructions.

MP内交換処理タスクでは、同報制御処理をMP−LP
間処理で実行せず、MP2から同報制御装置4への命令
により実行する。従って、複数の端末制御装置7に対す
る同報制御は1度の処理で実行できる。
In the intra-MP exchange processing task, the broadcast control processing is performed by MP-LP.
It is not executed as an intermittent process, but is executed by a command from the MP 2 to the broadcast control device 4. Therefore, broadcast control for a plurality of terminal control devices 7 can be executed in one process.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、交換処理プログラムと連
動することによりマルチプロセッサー方式の電子交換機
における複数のプロセッサーにより、分散制御される端
末装置群にデータリンクを介して接続する同報制御装置
を設け、プロセッサーからの同報命令により同報制御装
置が時間差なしでほぼ同時に一斉通報できるサービス効
果がある。
As explained above, the present invention provides a broadcast control device that connects via a data link to a group of terminal devices that are distributed and controlled by a plurality of processors in a multiprocessor type electronic exchange in conjunction with an exchange processing program. , there is a service effect in which the broadcast control device can send simultaneous broadcasts almost simultaneously without any time lag in response to broadcast commands from the processor.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の電子交換機の同報制御方式の一実施例
を示すブロック図である。 1.2・・・プロセッサ(LP、MP)、4・・・同報
制御装置、6・・・データリンク、7・・・端末制御装
置、8・・・端末装置。
FIG. 1 is a block diagram showing an embodiment of a broadcast control system for an electronic exchange according to the present invention. 1.2... Processor (LP, MP), 4... Broadcast control device, 6... Data link, 7... Terminal control device, 8... Terminal device.

Claims (1)

【特許請求の範囲】[Claims] マルチプロセッサー方式の電子交換機に収容される端末
装置群に対する電子交換機の同報制御方式において、直
接接続する端末装置を制御する端末制御装置と、端末装
置の制御を命令すると共に交換処理を実行する分散方式
によるプロセッサーと、このプロセッサーから直接受信
した同報制御命令を接続中の前記端末制御装置へ一斉に
送信する同報制御装置と、複数の前記端末制御装置およ
び少くとも一つの前記同報制御装置を収容接続し前記プ
ロセッサーの制御により端末制御装置および同報制御装
置の相互接続を交換処理するデータリンクと、を有する
ことを特徴とする電子交換機の同報制御方式。
In a broadcast control system for an electronic exchange for a group of terminal devices housed in a multiprocessor type electronic exchange, there is a terminal control device that controls the directly connected terminal devices, and a distributed control device that instructs the control of the terminal devices and executes switching processing. a broadcast control device that simultaneously transmits broadcast control commands directly received from the processor to the connected terminal control devices; a plurality of the terminal control devices and at least one of the broadcast control devices; 1. A broadcast control system for an electronic exchange, comprising: a data link that accommodates and connects a terminal control device and a broadcast control device and exchanges and processes mutual connections between a terminal control device and a broadcast control device under the control of the processor.
JP13254586A 1986-06-06 1986-06-06 Multiple address control system for electronic exchange Granted JPS62289030A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13254586A JPS62289030A (en) 1986-06-06 1986-06-06 Multiple address control system for electronic exchange

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13254586A JPS62289030A (en) 1986-06-06 1986-06-06 Multiple address control system for electronic exchange

Publications (2)

Publication Number Publication Date
JPS62289030A true JPS62289030A (en) 1987-12-15
JPH0545104B2 JPH0545104B2 (en) 1993-07-08

Family

ID=15083786

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13254586A Granted JPS62289030A (en) 1986-06-06 1986-06-06 Multiple address control system for electronic exchange

Country Status (1)

Country Link
JP (1) JPS62289030A (en)

Also Published As

Publication number Publication date
JPH0545104B2 (en) 1993-07-08

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