JPS62243039A - Processor state monitoring system for decentralized control type switchboard - Google Patents
Processor state monitoring system for decentralized control type switchboardInfo
- Publication number
- JPS62243039A JPS62243039A JP61086894A JP8689486A JPS62243039A JP S62243039 A JPS62243039 A JP S62243039A JP 61086894 A JP61086894 A JP 61086894A JP 8689486 A JP8689486 A JP 8689486A JP S62243039 A JPS62243039 A JP S62243039A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- processor
- ncp
- sends
- received
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012544 monitoring process Methods 0.000 title claims description 10
- 230000005856 abnormality Effects 0.000 claims abstract description 8
- 238000012806 monitoring device Methods 0.000 claims description 21
- 238000000034 method Methods 0.000 claims description 8
- 230000002159 abnormal effect Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
Landscapes
- Hardware Redundancy (AREA)
- Debugging And Monitoring (AREA)
- Multi Processors (AREA)
- Exchange Systems With Centralized Control (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明は、複数のプロセッサが信号バスを介してデータ
の送受信を行うことによって交換処理を実行する分散制
御式交換機のプロセッサ状態監視方式に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a processor status monitoring method for a distributed control switching system in which a plurality of processors execute switching processing by transmitting and receiving data via a signal bus.
［従来の技術］
従来、この種のプロセッサ状態監視方式は、システム全
体の状態を監視する１つの監視装置が、個々のプロセッ
サに対しあらかじめきめられた順序に従って周期的に会
話を行う動作を繰り返し、応答信号に異常が発見され、
又は応答信号がない時に監視装置はそのプロセッサに異
常が発生したことを発見していた。[Prior Art] Conventionally, in this type of processor status monitoring method, one monitoring device that monitors the status of the entire system repeatedly talks to each processor periodically in a predetermined order. An abnormality was discovered in the response signal,
Or, when there is no response signal, the monitoring device has discovered that an abnormality has occurred in the processor.
［発明が解決しようとする問題点］
上述した従来のプロセッサ状態監視方式では、監視装置
が各々のプロセッサと順々に会話をしていくため、監視
装置は個々のプロセッサに対し、常に状態間合せ信号を
発信しなければならず、監視装置の負担が大きくなると
いう欠点がある。[Problems to be Solved by the Invention] In the conventional processor status monitoring method described above, the monitoring device talks to each processor in turn, so the monitoring device constantly monitors the status of each processor. This method has the disadvantage that a signal must be transmitted, which increases the burden on the monitoring device.
本発明の目的は監視装置の負担を軽減しうるプロセラｉ
す状態監視方式を提供することにある。The purpose of the present invention is to reduce the burden on monitoring equipment by using
The purpose of the present invention is to provide a state monitoring method for
［問題点を解決するための手段］
本発明は信号バスを介して複数のプロセッサを接続し、
データの送受信を行なうことによって交換処理を実行し
、各々のプロセラ丈と監視装置との間で周期的に会話を
行なうことによって各々のプロセッサの異常を検出する
機能を有する分散制御式交換機において、監視装置から
状態間合せ信号を特定のプロセッサ゛に送信し、以後こ
の状態間合せ信号をプロセッサ相互間で順送りに送信さ
せ、状態間合せ信号を受信したプロセッサの各々が発す
る応答信号を監視装置で受信し、該監視装置で各プロセ
ッサの異常を判断さ「ることを特徴とする分散制御式交
換機のプロセッサ状態監視方式である。[Means for solving the problem] The present invention connects a plurality of processors via a signal bus,
In a distributed control exchange that has the function of executing exchange processing by sending and receiving data, and detecting abnormalities in each processor by periodically communicating between each processor and the monitoring device, monitoring A state adjustment signal is transmitted from the device to a specific processor, and thereafter this state adjustment signal is transmitted sequentially among the processors, and a response signal issued by each processor that has received the state adjustment signal is received by the monitoring device. This is a processor status monitoring method for a distributed control switching system, characterized in that the monitoring device determines whether there is an abnormality in each processor.
［実施例］ 次に本発明について図面を参照して説明する。[Example] Next, the present invention will be explained with reference to the drawings.
第１図は本発明の実施例のブ［！ツタ図である。FIG. 1 shows an embodiment of the present invention. It is an ivy diagram.
第１図において、ＢＵＳはプロセッサ間のデータの送受
信を行う信号バス、ＰＮＯ−ＰＮ３は信号バスＢＵＳを
介してデータを送受信することによって交換処理を行う
プロセッサ、ＮＣＰは信号バスＢＵＳを介してプロセッ
サＰＮＯ−ＰＮ３を監視および制御を行う監視装置であ
る。In FIG. 1, BUS is a signal bus that transmits and receives data between processors, PNO-PN3 is a processor that performs exchange processing by transmitting and receiving data via signal bus BUS, and NCP is a signal bus that transmits and receives data between processors. - It is a monitoring device that monitors and controls PN3.
本発明はプロセッサ相互間で信号の送受信が可能である
ことに着目したものであり、監８２装置ＮＣＲから状態
間合ぜ信号を特定のプロセッサＰＮＯに送信し、以降こ
の状態間合せ信号をプロセッサ相互間で送信させるもの
である。すなわち、第１図において監視装置ＮＣＰより
特定のプロセッサＰＮＯに対して第２図（ａ）のように
８ビツトのデータ１０１０１０１０の状態間合せ信号Ａ
Ａを出力する。信８ＡＡを受信したプロセッサＰＮＯは
監視装置ＮＣＰに第２図（ｂ）のような応答信号８Ｂを
出すとともに、信号ＡＡを次のプロセッサＰＮＩに対し
て送出する。プロセッサＰＮ１は信＠ＡＡを受信すると
、監視装置ＮＣＰに信号ＢＢを出すとともにプロセッサ
ＰＮ２に信＠ＡＡを出す。信号ＡＡを受信したプロセッ
サＰＮ２は信号ＢＢを監視装置ＮＣＰに出すとともにプ
ロセッサＰＮ３に対し信号ＡＡを発信する。信号ＡＡを
受信したプロセッサＰＮ３は監視装置ＮＣＰに信号ＢＢ
を発信するとともにプロセッサＰＮＯに対し信号ＡＡを
発信する。以上の処理をそれぞれのプロセッサが繰り返
す。監視装置ＮＣＰ’は信号ＡＡをプロセッサＰＮＯに
対して発信した時又は信号ＢＢを受信した時から、次の
信号ＢＢを受信するまでの時間を監視し、一定時間以上
経過しても゛信号ＢＢを受信できないか又は信号ＢＢ以
外の信号を受信した時にはプロセッサに異常があると判
断して、例えばプロセッサＰＮ２に異常があれば、プロ
セッサＰＮ２からプロセッサＰＮ３に対して第２図（Ｃ
）にような状態間合せ信号ＣＣを出し、各々のプロセッ
サＰＮ２〜ＰＮ３からの信号ＡＡを待つ。監視装置１Ｎ
ｃＰは信号ＢＢが返送されない又は信＠ＢＢ以外の信号
を返送したプロセッサＰＮ２が異常であることを検出す
る。The present invention focuses on the fact that signals can be transmitted and received between processors, and the controller 82 device NCR transmits a state alignment signal to a specific processor PNO, and thereafter this state alignment signal is transmitted to and from the processors. It is used to send data between That is, in FIG. 1, the monitoring device NCP sends a state adjustment signal A of 8-bit data 10101010 to a specific processor PNO as shown in FIG. 2(a).
Output A. Processor PNO, which has received signal 8AA, issues a response signal 8B as shown in FIG. 2(b) to monitoring device NCP, and also sends signal AA to the next processor PNI. When the processor PN1 receives the signal @AA, it issues a signal BB to the monitoring device NCP and also issues a signal @AA to the processor PN2. Processor PN2, which has received signal AA, sends signal BB to monitoring device NCP and also sends signal AA to processor PN3. Processor PN3, which received signal AA, sends signal BB to monitoring device NCP.
It also sends a signal AA to the processor PNO. Each processor repeats the above process. The monitoring device NCP' monitors the time from the time when the signal AA is transmitted to the processor PNO or the time when the signal BB is received until the next signal BB is received. If the signal cannot be received or a signal other than the signal BB is received, it is determined that there is an abnormality in the processor.
) and waits for signals AA from each of the processors PN2 to PN3. Monitoring device 1N
cP detects that the processor PN2 which has not returned the signal BB or which has returned a signal other than the signal @BB is abnormal.
［発明の効果］
以上説明したように本発明は監ＰＡ装置が最初に特定の
プロセッサに対して信号を送出した以後はその信号をプ
ロセッサ相互間で送信させて各プロセッサを監視するた
め、監視装置の負担を軽減で、きる効果がある。[Effects of the Invention] As explained above, the present invention enables the monitoring device to monitor each processor by transmitting the signal between the processors after the monitoring PA device first sends a signal to a specific processor. It has the effect of reducing the burden on people.
第１図は本発明の実施例のブロック図、第２図（ａ）、
（ｂ）、 （ｃ）は信号の構成を示す図である。
ＰＮＯ−ＰＮｎ・・・プロセッサ
ＮＣＰ・・・監８２装置
ＢＵＳ・・・信号バスFIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2(a),
(b) and (c) are diagrams showing the structure of signals. PNO-PNn...Processor NCP...Supervisor 82 device BUS...Signal bus
Claims (1)
ータの送受信を行なうことによって交換処理を実行し、
各々のプロセッサと監視装置との間で周期的に会話を行
なうことによって各々のプロセッサの異常を検出する機
能を有する分散制御式交換機において、監視装置から状
態問合せ信号を特定のプロセッサに送信し、以後この状
態間合せ信号をプロセッサ相互間で順送りに送信させ、
状態問合せ信号を受信したプロセッサの各々が発する応
答信号を監視装置で受信し、該監視装置で各プロセッサ
の異常を判断させることを特徴とする分散制御式交換機
のプロセッサ状態監視方式。(1) Execute exchange processing by connecting multiple processors via a signal bus and transmitting and receiving data,
In a distributed control switching system that has the function of detecting abnormalities in each processor by periodically communicating between each processor and a monitoring device, the monitoring device sends a status inquiry signal to a specific processor, and then This state adjustment signal is sent sequentially between processors,
1. A processor status monitoring method for a distributed control switching system, characterized in that a monitoring device receives a response signal issued by each processor that has received a status inquiry signal, and causes the monitoring device to determine an abnormality in each processor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61086894A JPS62243039A (en) | 1986-04-15 | 1986-04-15 | Processor state monitoring system for decentralized control type switchboard |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61086894A JPS62243039A (en) | 1986-04-15 | 1986-04-15 | Processor state monitoring system for decentralized control type switchboard |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62243039A true JPS62243039A (en) | 1987-10-23 |
Family
ID=13899542
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61086894A Pending JPS62243039A (en) | 1986-04-15 | 1986-04-15 | Processor state monitoring system for decentralized control type switchboard |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62243039A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0227442A (en) * | 1988-07-15 | 1990-01-30 | Nec Corp | Fault detecting system |
-
1986
- 1986-04-15 JP JP61086894A patent/JPS62243039A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0227442A (en) * | 1988-07-15 | 1990-01-30 | Nec Corp | Fault detecting system |
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