JPS62287346A - Resetting device - Google Patents

Abstract

PURPOSE:To constitute the titled device so that normal operation can be continued even if noise is applied to a trigger input, by using a clear terminal as the trigger input of a monostable multivibrator for generating a reset signal. CONSTITUTION:In case a microprocessor 1 runs away, and a trigger pulse is not outputted from an address decoder 3, an output Q of a retrigger monostable multivibrator 4 is varied from an 'L' level to an 'H' level. By such an output variation, an output Q of a monostable multivibrator 5 outputs a pulse having width of TW2, and resets the microprocessor 1. In case when noise has entered into an output signal of the retrigger monostable multivibrator 4, since a clear input terminal of the monostable multivibrator 5 is in an 'L' level, only a pulse having width of the same degree as that of the noise appears in its output Q. Therefore, a charged charge of a capacitor 14 is scarcely discharged, and the normal operation can be continued.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention Industrial Application Field The present invention relates to a reset device that resets a microprocessor when it goes out of control. When the microprocessor goes out of control due to such reasons, it is possible to restore normal operation by resetting the microprocessor.

2. Prior Art An example of a conventional microprocessor reset device is shown in the fourth example.
As shown in the figure. In the figure, 1 is a microprocessor, 12L is a data bus, 1b is an address bus, 2 is a memory device that stores programs, and 3 is an address decoder that outputs a pulse only when the microprocessor 1 outputs a certain address. .

4 is a retrigger monostable multivibrator operated by the output pulse of the address decoder 3, and the output pulse deviation is set by an external capacitor 6a and a resistor 6b. The Q output of the retrigger monostable multivibrator 4 is:
The trigger input terminal of the next-stage monostable multipipulator 5 is connected to the trigger terminal, and a trigger is triggered by this signal change. Monostable multivibrator 5 has external capacitor 7 & resistor 7
Outputs a pulse with a pulse width set by b. or,
The pulse output from the monostable multivibrator 5 is
The microprocessor 1 is reset by making the transistor 9 conductive through the resistor 8, discharging the charge in the capacitor 14 through the resistor 10, and setting the reset signal 16 to the "L" level. 11 is a power-on reset circuit for resetting the microprocessor 1 when the power is turned on, and resistor 12. Diode 13. It consists of a capacitor 14 and is a well-known circuit.

Further, the single trigger monostable multivibrator 4 and the next-stage monostable multivibrator 6 that operate in the same manner can be used, and their electrical characteristics are as shown in Table 1.

(Left below) Table 1 The operation of the conventional reset device configured as described above will be explained. The memory device 2 stores a program that causes the microprocessor 1 to output a specific address for changing the output of the address decoder 3 at a certain time interval T or less.
When is operating normally, address decoder 3 outputs T.
Pulses are sent to the retrigger monostable multivibrator 4 at the following intervals. When the retrigger monostable multivibrator 4 receives a signal (trigger pulse) that changes from the II H# level to the L" level to the trigger input, the retrigger monostable multivibrator 4 waits for a time set by an external capacitor 68L and a resistor 6b. Tw) is output, and if a trigger pulse is input again while the pulse is being output, the output pulse will be Tw from the trigger pulse input again.

0 where Tw,
>T, the Q output of the retrigger monostable multivibrator 4 is always at H level when the microprocessor 1 is operating normally, and the 6 trigger input is marked with a trigger pulse, so transistor 9 is cut off /!
, and the microprocessor 1 is not reset.

When the microprocessor 1 goes out of control due to noise etc. and stops outputting a specific address, the trigger pulse output from the address decoder 3 to the re-trigger monostable multivibrator 4 disappears, and the last input trigger pulse Tw later.

When re-triggered, the Q output of the monostable multivibrator 4 changes from the H level to the L level.

When this signal is applied to the trigger input cam of the next-stage monostable multivibrator 5, a pulse with a time width (Tw2) set by the external capacitor 71L and resistor 7b is output to its Q output, and this pulse discharges the charge in the capacitor 14 through the resistor 1o and resets the microprocessor. FIG. 6 shows the timing of this operation.

Most of the causes of microprocessors running out of control are due to one-off noises, and even with conventional reset devices, when a microprocessor runs out of control, a reset occurs.
Normal operation can be restored.

Problems to be Solved by the Invention However, in the configuration described above, the trigger input terminal of the monostable multivibrator is likely to operate due to one-off noises, and the microprocessor may be sensitive to noise even if it does not go out of control. When this happens, a pulse with a width of Tw2 is generated, causing a malfunction in which the microprocessor is reset. FIG. 6 shows a timing chart when this malfunction occurs.

In view of the above problems, the present invention provides a reset device that resets a microprocessor only when the microprocessor goes out of control.

Means for Solving the Problems In order to solve the above problems, the reset device of the present invention includes:
The output of the retrigger monostable multivibrator is connected to the clear terminal of all subsequent stage monostable multivibrators.

Effect: With the above-described configuration, even if noise enters the clear terminal of the next-stage monostable multivibrator and a pulse appears at its output, the pulse is immediately cleared by the clear signal, so the width is the same as that of the noise. Since only 1 pulse is output and the charge in the capacitor forming the power-on reset circuit is hardly discharged, it is not possible to reset the microprocessor.

Embodiment Hereinafter, a reset device according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a circuit configuration diagram of a reset device in an embodiment of the present invention.

In FIG. 1, 4 is a retrigger monostable multivibrator, and its Q (inverted Q) output is connected to the clear terminal (CLFI) of the next stage monostable multivibrator 5. Here, the retrigger monostable multivibrator 4 and the next stage monostable multivibrator 5 use a retrigger monostable multivibrator having the electrical characteristics shown in the above-mentioned clothing 1,
Clear terminal (CLR) of next-stage monostable multivibrator 6
Trigger input A is set to H level so that a pulse is output in response to a rising signal of ). Since other points are the same as the conventional example, detailed explanation will be omitted.

In this embodiment, when the microprocessor 1 is operating normally, the address decoder 3 outputs trigger pulses at time intervals of T or less, and the Q output of the retrigger monostable multivibrator 4 is always at the L level. and
Since the Q output of the next-stage monostable multivibrator 5 is held at L level, the microprocessor 1 is not reset. Further, if the microprocessor 1 goes out of control and the trigger pulse is no longer output from the address decoder 3, the monostable multivibrator is retriggered. Due to this output change, the output q of the monostable multivibrator 5 becomes
A pulse with a width of Tw2 is output and the microprocessor 1 is reset. The timing of this operation is shown in FIG.

As in the conventional example, when noise enters the output signal of the retrigger monostable multivibrator 4, in this example,
Since the clear input terminal of the monostable multi-pipe saw 6 is at the L level, its output Q does not have a pulse with a width like Tw2 as in the conventional example, but a pulse with a width similar to that of noise. Only pulses appear. Therefore, the capacitor 14 used in the power-on reset circuit 11 is hardly charged or discharged, and the microprocessor 1 is not reset, allowing normal operation to continue. FIG. 3 shows the timing when this noise occurs.

Effects of the Invention As described above, according to the present invention, since the clear terminal is used as the trigger input of the monostable multivibrator that creates the reset signal, noise is not applied to the trigger input as in the conventional example. However, the microprocessor is not reset and can continue to operate normally. Then, by performing a predetermined operation only when the microprocessor goes out of control and resetting the microprocessor, an excellent effect can be obtained in that the microprocessor is returned to normal operation.

[Brief explanation of the drawing]

FIG. 1 is a circuit configuration diagram of a reset device in an embodiment of the present invention, FIG. 2 is a timing chart when a microprocessor goes out of control in an embodiment of the present invention, and FIG. Figure 4 is a circuit diagram of a conventional reset device; Figure 6 is a timing chart of a conventional reset device when the microprocessor goes out of control; Figure 6 is a reset of the conventional example. It is a timing chart when a device malfunctions due to noise. 1...Microprocessor, 2...Memory device, 3...Address decoder, 4...
... Re-trigger monostable multi-pipe sorter, 5...
...monostable multivibrator, 9...transistor, 11...power-on resect circuit. Name of agent: Patent attorney Toshio Nakao and 1 other person 4-
4 rumored sword 1 - cheap ζma blade + hyphrator 5 - to be respectful, Maku is no ＼eflier / 7 - power oscillator reset box 1 Figure 1 tXZ diagram Figure 3 (14) Qli:i Calipit's /I Meiho (75) Micro 70e, v pump JE front operation, figure 4

Claims (1)

[Claims] a microprocessor, an address decoder for decoding a specific address from the microprocessor, and an address for changing the output of the address decoder at a fixed time interval T or less when the microprocessor is operating normally; a retrigger monostable multivibrator that generates a pulse having a width equal to or longer than the time interval T based on the output of the address decoder; The output of the retrigger monostable multivibrator is connected to the clear terminal of the next stage monostable multivibrator, and the output pulse of the next stage monostable multivibrator causes the output pulse of the next stage monostable multivibrator to trigger the microprocessor. A reset device characterized in that it is configured to reset.