JPS62275090A - Production of semi-insulating semiconductor single crystal - Google Patents

Production of semi-insulating semiconductor single crystal

Info

Publication number
JPS62275090A
JPS62275090A JP11569986A JP11569986A JPS62275090A JP S62275090 A JPS62275090 A JP S62275090A JP 11569986 A JP11569986 A JP 11569986A JP 11569986 A JP11569986 A JP 11569986A JP S62275090 A JPS62275090 A JP S62275090A
Authority
JP
Japan
Prior art keywords
crystal
single crystal
specific resistance
semi
pulling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11569986A
Other languages
Japanese (ja)
Inventor
Takayuki Sato
貴幸 佐藤
Yasuyuki Sakaguchi
泰之 坂口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Holdings Corp
Original Assignee
Showa Denko KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Showa Denko KK filed Critical Showa Denko KK
Priority to JP11569986A priority Critical patent/JPS62275090A/en
Publication of JPS62275090A publication Critical patent/JPS62275090A/en
Pending legal-status Critical Current

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  • Crystals, And After-Treatments Of Crystals (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)

Abstract

PURPOSE:To obtain a high quality single crystal having increased specific resistance, maintaining uniformity and depositing fo secondary crystal by using a molten III-V compound semiconductor contg. Fe, Cr or Co and by specifying crystal orientation at the time of pulling. CONSTITUTION:A molten III-V compound semiconductor contg. one or more among Fe, Cr and Co is used as starting material. The semiconductor may be indium phosphide. Crystal orientation is set to <111> at the time of pulling and a semi-insulating semiconductor single crystal is pulled up by conventional LEC method. Thus, a single crystal having slightly lower specific resistance at the peripheral part but high specific resistance at the central part and a uniform distribution of specific resistance in a cross-section can be obtd., so wafers having high specific resistance can be easily obtd. by slightly cutting off the peripheral part of the crystal.

Description

【発明の詳細な説明】 3、発明の詳細な説明 「産業上の利用分野」 本発明は、半導体装置用の基板として利用する半絶縁性
II −V族化合物半導体単結晶の製造方法に関するも
のである。
[Detailed Description of the Invention] 3. Detailed Description of the Invention "Field of Industrial Application" The present invention relates to a method for manufacturing a semi-insulating II-V group compound semiconductor single crystal to be used as a substrate for a semiconductor device. be.

「従来の技術および問題点」 周知のように、半絶縁性砒化ガリウムや半絶縁性リン化
インノウムは、各種マイクロ波素子、光学素子、磁気素
子等の基板として使用されている。
"Prior Art and Problems" As is well known, semi-insulating gallium arsenide and semi-insulating innoum phosphide are used as substrates for various microwave devices, optical devices, magnetic devices, and the like.

最近、この基板にイオンを注入する技術が開発され、集
hf回路(IG)?大規模集&i回路(LSI)への応
用分野がひらけてきた。このイオン注入等の加工を行な
う際にはなんらかの熱処理が加わるため、基板の電気特
性が熱的にも安定であることか不可欠の要件となってい
る。
Recently, a technology for implanting ions into this substrate has been developed, and integrated HF circuit (IG)? The field of application to large-scale integrated circuits and i-circuits (LSI) has opened up. Since some kind of heat treatment is added during processing such as ion implantation, it is essential that the electrical characteristics of the substrate be thermally stable.

さらに、IC,LSI用の基板としては、比抵抗が[0
°Ω・cm程度の従来の半絶縁性のものより乙一層高い
比抵抗、例えば、300°にで107〜10’Ω・Cm
以」二であることが要求される。
Furthermore, as a substrate for IC and LSI, the specific resistance is [0
Higher resistivity than conventional semi-insulating ones of around °Ω・cm, for example, 107 to 10′Ω・cm at 300°.
It is required that:

砒化ガリウムにおいて、上記条件を満たすためには、従
来、次のような手段が取られていた。
Conventionally, the following measures have been taken to satisfy the above conditions for gallium arsenide.

(イ) クロムをドープする結晶成長法。(a) Crystal growth method that involves doping with chromium.

(ロ)酸素をドープする結晶成長法。(b) Crystal growth method by doping oxygen.

(ハ)不純物濃度の低いアンドープ結晶成長法。(c) Undoped crystal growth method with low impurity concentration.

この内、(イ)と(ロ)は、結晶内で導電性不純物とな
るSiやCu、またはGaやAsの空孔、さらにこれら
の空孔と不純物との複合体をドープすることにより電気
的に補償する方法である。
Of these, (a) and (b) are electrically conductive by doping Si, Cu, Ga, and As vacancies, which become conductive impurities in the crystal, and a complex of these vacancies and impurities. This is a method of compensating for

(イ)の方法では、砒化ガリウムに対するクロムの幅釘
係数か約6 X 10−’と小さく、極めて結晶内に入
りにくいため、ドーピング制御は困難である。
In method (a), doping control is difficult because the width coefficient of chromium relative to gallium arsenide is small, about 6 x 10-', and it is extremely difficult to enter the crystal.

また、電気的特性を安定にするために過剰なりロムをド
ープすると、転位密度の欠陥や析出物が多く発生し、逆
に少量のクロムをドープすると、熱的に不安定となりや
すい、などの問題点がある。
In addition, if excessive chromium is doped to stabilize electrical characteristics, many defects and precipitates will occur due to dislocation density, while if a small amount of chromium is doped, it will tend to become thermally unstable. There is a point.

(ロ)の方法は、ドーピング制御が困難であり、熱的安
定性かよくないという欠点をもっている。
The method (b) has the drawbacks that doping control is difficult and thermal stability is poor.

また、上記(ハ)の方法では、それを有効に実現さける
ための手法としては直接合成液体カプセル引き上げ法か
rPekarek et、al;Czech、J、Ph
ys、、20(+970)]に記載されている。従来の
液体カプセル引き上げ法(L E C法、Liquid
 Encapsulated Cz。
In addition, in the method (c) above, as a method for effectively realizing it, there is a direct synthetic liquid capsule pulling method or Pekarek et al; Czech, J, Ph.
ys, 20(+970)]. Conventional liquid capsule pulling method (LEC method, Liquid
Encapsulated Cz.

chraski法)が一度合成した砒化ガリウムを原料
とするために不純物の取り込みが多いのに対して、この
方法はガリウムと砒素とから高圧下で直接合成して引き
上げ成長を行なわせるために不純物の取り込みが少なく
、いわゆる「真性半導体」になると言われている。しか
し、現状では、この方法で成長させた結晶でも不純物濃
度が高く、しかも高圧にする必要上、炉内構造が従来と
は異なっており、引き上げ成長作業が困難となる。さら
に、従来の引き上げ法と同様にストイキオメトリ−から
のずれや転位密度が多いなど、問題点が多い。
Chraski method) uses gallium arsenide that has been synthesized once as a raw material and therefore incorporates a large amount of impurities, whereas this method directly synthesizes gallium and arsenic under high pressure and performs pulling growth, so it is difficult to incorporate impurities. It is said that this makes it a so-called "intrinsic semiconductor". However, at present, even crystals grown using this method have a high concentration of impurities, and due to the need for high pressure, the internal structure of the furnace is different from conventional ones, making pulling growth difficult. Furthermore, like the conventional pulling method, there are many problems such as deviation from stoichiometry and high dislocation density.

また、リン化インジウムにおいては、アンドープ結晶で
は半絶縁性とはならないため、Fe、 Cr、Co等を
トープして半絶縁性結晶を得ているか、上記同様の問題
点を抱え、一定品質の半導体素子を歩留りよく作成する
ことが困難となっている。
In addition, in the case of indium phosphide, undoped crystals are not semi-insulating, so either they are doped with Fe, Cr, Co, etc. to obtain semi-insulating crystals, or they suffer from the same problems as mentioned above and cannot be used as semiconductors of a certain quality. It has become difficult to produce devices with a high yield.

本発明は、上記事情に鑑みてなされたしので、その目的
は、半絶縁性の単結晶を作成するに際して、単結晶中の
比抵抗を高め、なおかつ、その均一性を保ち、引き上げ
結晶中に2次相を晶出させることなく、良質の単結晶を
得る方法を提供することにある。
The present invention has been made in view of the above circumstances, and its purpose is to increase the specific resistance in the single crystal while maintaining its uniformity when producing a semi-insulating single crystal, and to The object of the present invention is to provide a method for obtaining a high-quality single crystal without crystallizing a secondary phase.

「問題点を解決するための手段」 本発明に係る半絶縁性半導体単結晶の製造方法は、Fe
5Cr、Coから選ばれた1種の元素を添加した[−V
族化合物半導体融液を使用し、結晶方位を<l I l
>にして引き上げろことを特徴とするらのである。
"Means for Solving the Problems" The method for manufacturing a semi-insulating semiconductor single crystal according to the present invention includes Fe
5Cr, Co added one kind of element [-V
Using a group compound semiconductor melt, the crystal orientation is <l I l
>It is characterized by being able to pull up.

「作用 」 上記構成の本発明方法は、<l l I>方向の引き上
げにおいては、成長結晶の中心部でファセット(fac
eL)成長が起こり、その部分での不純物の実効偏析係
数か高くなるということを利用するものである。
``Operation'' The method of the present invention having the above configuration has a facet (fac
eL) This method takes advantage of the fact that growth occurs and the effective segregation coefficient of impurities increases in that region.

不純物を含んだ融液から結晶を晶出させていくと、凝固
の進行とともに、融液中の不純物濃度が変化し、これに
伴って、その融液から固化した結晶中の不純物濃度ら変
化していく。残留メルト中の不純物濃度が固溶限度を越
えれば、2次相を品出してしまう。従って、比抵抗を高
めるために不純物(Fe)を多くドープしようとしてら
多く入らなかったり、欠陥が出易くなり、結晶の歩留り
ら悪い。
When crystals are crystallized from a melt containing impurities, the impurity concentration in the melt changes as solidification progresses, and the impurity concentration in the crystal solidified from the melt changes accordingly. To go. If the impurity concentration in the residual melt exceeds the solid solubility limit, the secondary phase will be eliminated. Therefore, even if an attempt is made to dope a large amount of impurity (Fe) to increase the resistivity, the amount of impurity (Fe) may not be doped or defects may easily appear, resulting in poor crystal yield.

そこで、実効偏析係数が高いことを利用すると、同じ融
液中の不純物濃度から晶出さU−た場合、結晶中ヘドー
ブされる不純物量は多くなり、反対に融液中に残留する
不純物量の増加は低く抑えられる。その結果、固溶限度
まで余裕か生じ、トープ濃度の高い結晶の歩留りが高く
なり、2次相の発生乙卯えられることになる。
Therefore, if the effective segregation coefficient is high, when crystallization occurs from the same impurity concentration in the melt, the amount of impurities doped into the crystal will increase, and conversely, the amount of impurities remaining in the melt will increase. can be kept low. As a result, there is a margin up to the solid solubility limit, the yield of crystals with a high tope concentration increases, and the generation of secondary phases is observed.

本発明では、成長結晶の周辺部において、やや比抵抗の
低い部分か生じろ乙のの、結晶中心部では、比抵抗が従
来の結晶に比べて格段に高く、しかも同一断面におけろ
比抵抗の分布が極めて均一な単結晶を得ることができる
。従って、結晶の周辺部を多少カプトすれば、比)氏抗
の高いウェハーを容易に得ることか可能となる。
In the present invention, although there may be a portion of slightly low resistivity at the periphery of the growing crystal, at the center of the crystal the resistivity is much higher than that of conventional crystals, and moreover, even in the same cross section It is possible to obtain a single crystal with extremely uniform distribution of . Therefore, by cutting the peripheral portion of the crystal to some extent, it is possible to easily obtain a wafer with high resistance.

なお、引き上げ方位の選定は、種結晶として、成長面を
<l I 1>に合わ口“て加工したものを使用すれば
よい。また、リン化インジウム単結晶の場合の引き上げ
条件としては、キャリア濃度5×10”cm−3以下の
高純度のリン化インジウムを用い、その初期融液のF 
e濃度は0.01〜0.07wL%適当て、他は通常の
LEC法に従えばよい。また、本発明においては、磁場
強さ800工ルステツド以上をかけた磁場中き上げを利
用することらできる。
To select the pulling direction, use a seed crystal whose growth surface is aligned with <l I 1>. Also, the pulling conditions for indium phosphide single crystal are as follows: Using high-purity indium phosphide with a concentration of 5 x 10" cm-3 or less,
The e-concentration may be determined appropriately from 0.01 to 0.07 wL%, and other values may be determined according to the usual LEC method. Further, in the present invention, it is possible to utilize a magnetic field with a magnetic field strength of 800 degrees or more.

次に、本発明の詳細な説明する。Next, the present invention will be explained in detail.

「実施例」 下記条件にて、直径2インチのリン化インジウムの単結
晶引き上げを行なった。
"Example" A single crystal of indium phosphide having a diameter of 2 inches was pulled under the following conditions.

・原料・・・10x 1015cm“3のキャリア濃度
で、初期融液のFe添加量がO,025wt%であるリ
ン化インジウム。
- Raw material: Indium phosphide with a carrier concentration of 10 x 1015 cm"3 and an Fe addition amount of O.025 wt% in the initial melt.

・引き上げ方法・・・引き上げ方位を<III>とじた
他は、通常のLEC 法に従った。
- Pulling method: The normal LEC method was followed except that the lifting direction was set to <III>.

引き上げ後の単結晶について、長さ方向で172の位置
からウェハーを切り出し、比抵抗の内面分布を測定した
(中心から半径方向に複敢方向選んで合計120点測定
)。測定結果は第1図に示した。
The wafer was cut out from 172 positions in the length direction of the single crystal after being pulled, and the internal surface distribution of resistivity was measured (a total of 120 points were measured, selected from multiple directions in the radial direction from the center). The measurement results are shown in Figure 1.

第1図から明らかなように、本発明により得た結晶では
、結晶の外周部で比抵抗の低下が見られるものの、中心
部の大部分は比抵抗がIO8Ω・cm以上と高く、かつ
比抵抗の標準偏差は7%であった。
As is clear from FIG. 1, in the crystal obtained according to the present invention, although a decrease in resistivity is observed at the outer periphery of the crystal, most of the central region has a high resistivity of IO8Ω・cm or more, and The standard deviation of was 7%.

「発明の効果」 以上説明したように、本発明に係る半絶縁性半導体単結
晶の製造方法によれば、成長結晶の周辺部において、や
や比抵抗の低い部分が生じるものの、結晶中心部では、
比抵抗が従来の結晶に比べて格段に高く、しから同一断
面における比抵抗の分布が極めて均一な単結晶を得るこ
とができる。
"Effects of the Invention" As explained above, according to the method of manufacturing a semi-insulating semiconductor single crystal according to the present invention, although a portion with a slightly low resistivity occurs at the periphery of the grown crystal, at the center of the crystal,
It is possible to obtain a single crystal that has a much higher resistivity than conventional crystals and has an extremely uniform distribution of resistivity in the same cross section.

従って、本発明方法により得た結晶は、その周辺部を多
少カットすれば比抵抗の高いウェハーを容易に得ること
が可能となる。
Therefore, with the crystal obtained by the method of the present invention, it is possible to easily obtain a wafer with high resistivity by cutting the periphery to some extent.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明方法により得られたリン化インジウム単
結晶の長さ方向1/2の位置での切断面内の比抵抗分布
を示すグラフである。
FIG. 1 is a graph showing the specific resistance distribution within a cut plane at a position half in the length direction of an indium phosphide single crystal obtained by the method of the present invention.

Claims (1)

【特許請求の範囲】[Claims] LEC法により化合物半導体単結晶を製造するに際し、
Fe、Cr、Coから選ばれた1種の元素を添加したI
II−V族化合物半導体融液を使用し、結晶引き上げ方位
を<111>とすることを特徴とする半絶縁性半導体単
結晶の製造方法。
When manufacturing compound semiconductor single crystals by the LEC method,
I added with one element selected from Fe, Cr, and Co
1. A method for producing a semi-insulating semiconductor single crystal, using a II-V group compound semiconductor melt and setting the crystal pulling direction to <111>.
JP11569986A 1986-05-20 1986-05-20 Production of semi-insulating semiconductor single crystal Pending JPS62275090A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11569986A JPS62275090A (en) 1986-05-20 1986-05-20 Production of semi-insulating semiconductor single crystal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11569986A JPS62275090A (en) 1986-05-20 1986-05-20 Production of semi-insulating semiconductor single crystal

Publications (1)

Publication Number Publication Date
JPS62275090A true JPS62275090A (en) 1987-11-30

Family

ID=14669041

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11569986A Pending JPS62275090A (en) 1986-05-20 1986-05-20 Production of semi-insulating semiconductor single crystal

Country Status (1)

Country Link
JP (1) JPS62275090A (en)

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