JPS62268000A - Inspection method for semiconductor memory device - Google Patents

Abstract

PURPOSE:To find the more accurate maximum value of a current strictly, by performing the measurement of a power source current by a chip select mode, or performing the measurement of the power source current of a semiconductor memory device by setting a mode in a chip non-select mode, after the readout operation of a cell data, and the write operation of the inverted data of the cell data for all of the addresses are performed. CONSTITUTION:First of all, a power source is turned OFF(off)1, and afterwards, the power source is turned ON(on)2, and the semiconductor memory device is set at a chip select mode A, then an operation state 3 is set. One address in all address spaces is accessed, and the data of a memory cell is read out, and the write operation 4 that is the write of the inverted data of the above data is performed for all of the addresses, and after completing an operation 5, the measurement of the power source current is performed. Furthermore, the semiconductor memory device is set at a chip non-select mode B, and is is set at a standby state 7, then the measurement 8 of the power source current is performed.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for testing a semiconductor memory device, and mainly relates to a method for measuring a power supply current of a semiconductor memory device.

BACKGROUND ART The power supply current in a semiconductor memory device, especially the standby current value, is a static current obtained as the sum of the leakage current in the memory cell and the leakage current in the peripheral circuit, that is, D
CIJ is the current. This current changes due to variations in V, (LJ value), fluctuations in process parameters, etc., and also depends on the specifications of the semiconductor memory device as the power supply current when the semiconductor memory device is not operating, that is, during standby. One of the important parameters for its performance in
Therefore, it is very important to accurately understand its maximum value.

The current consumption of a semiconductor memory device can be measured in two ways: after applying a power supply voltage, when the semiconductor memory device is in operation, that is, in a chip selection mode, and when it is further set in a standby state, that is, in a chip non-selection mode. In these cases, measurements are conventionally carried out without particularly considering whether the data held in each cell of the memory to be measured is a different value especially in the non-select mode.

In general, when data in a memory cell of a semiconductor memory device is simply applied with a power supply voltage and no data write operation is performed, each memory cell corresponding to the entire address space is stored with a certain predetermined data 'O (zero)' or ' ″1(
It is known that each cell of 1)' tends to have one value or the other. This means that each memory cell holds data of either 0' or 11' in order to have a more stable state. When each memory cell has one of the values, the memory cell is connected to the GND (ground) side or VDD (
Data is held in a state where leakage current to the power supply side is minimized and a stable state is achieved.

Problems to be Solved by the Invention In the conventional method of measuring the power supply current in this state, the value is measured in a static stable state. Obtaining results is difficult. In other words, when a memory cell retains that data, it is in a more stable state than when it retains the inverted data, so the power supply current, especially the standby current, becomes a lower current value when certain data is intentionally written. Therefore, it is difficult with conventional methods to determine the maximum value of a static current, particularly a standby current value, as a power supply current.

The present invention provides a measurement method that can be implemented relatively easily and simply, which enables measurement in a state where the power supply current, particularly the standby current, in a semiconductor memory device is at its maximum.

Means for Solving the Problems The present invention has been made in order to eliminate the drawbacks of conventional methods for measuring power supply current, particularly standby current, etc. in semiconductor memory devices. When measuring current, the operation of accessing one address in the entire address space, reading that cell data, and writing the inverted data for the data naturally held in the memory cell by applying the power supply voltage to all addresses. After repeating this, the power supply current is measured in chip selection mode or the power supply current of the semiconductor memory device is measured in chip non-selection mode.

Operation The present invention measures the two currents of the power supply current using the above-described means, thereby setting each memory cell in a state in which data retention is more unstable and a DC-like leak current flows in that cell more. As a result,
It becomes possible to obtain the maximum value of the DC power supply current, and it becomes possible to grasp the current value more precisely.

Example A first embodiment of the present invention will be described in detail using the drawings.

FIG. 1 shows a diagram describing the sequence of the measurement method according to the first embodiment of the present invention, FIG. 2 a shows read data for a memory cell, and FIG. . FIG. 1 shows an embodiment of the sequence of the measuring method of the present invention. First of all, turn off the power
1. Thereafter, the power is turned ON (ON2) to put the semiconductor memory device into the chip selection mode and into the operating state B3.

In this state, it is assumed that the data held by each memory cell of this semiconductor memory device is a value that each memory cell naturally has when power is applied, and has a value as shown in FIG. 2a. xOl xl 1 x2 in Figure 2a and Figure 2S
"""xn-4TOI YI"""Ym-1 indicates the ROW address column address of the cell array of the semiconductor memory device. Therefore, one address in the entire address space is accessed, the data of that memory cell is read, and the inverted data of that data is written.The operation 4-6 is performed on all addresses, and as a result, the data held by each cell is is shown in Figure 2. After completion of operation 6, sequence 6 is for measuring the power supply current. DC operating power supply current can be measured. Further, the semiconductor memory device is set in chip non-selection mode B and placed in a standby state, and power supply current measurement 8 is performed. In this case, the standby current is measured. The operation sequence after the measurement is other than operation 9 and is not particularly limited.

In addition, in FIG. 2, 10.11 is a memory cell array,
12 and 13 indicate data ``0'' and ``1'' of the memory cells. Further, the present invention can also be applied to a semiconductor memory cell array that can be controlled by similar functions corresponding to chip selection and non-selection modes in a semiconductor memory device.

Effects of the Invention As described above, according to the present invention, the insufficiency of grasping the maximum value of current by the conventional standby power supply current and DC operating power supply current measurement methods is solved, and a more accurate maximum value is determined strictly. becomes possible. In particular, as shown in the embodiments of the present invention, measurement can be realized with fewer changes than the conventional measurement method, and it is simpler and more precise to accurately measure the DC leakage current of a semiconductor memory device. This has the effect of allowing the maximum value of the power supply current to be measured very accurately.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a sequence of a method according to an embodiment of the present invention;
FIGS. 2A and 2B are diagrams showing examples of read data of memory cells and inverted data written to each memory cell, respectively. A, B...Chip selection and non-selection mode of semiconductor memory device, 1-9...Stella 7'' of each operation sequence, 10.11...Memory cell array, 12゜13・・・・・・Memory set /L/ data・0
・and・1・, xo"xn-+... Row address of memory cell array "a""m-+... Column address of memory cell array 0 Name of agent Patent attorney Satoshi Nakao Male and 1 other person 1st
Figure 2 (Kun (bun)

Claims (2)

[Claims] (1) After applying a power supply voltage to the semiconductor memory device, select any one address in the chip selection mode, read the data of that memory cell, and write the inverted data to the same address. A method for testing a semiconductor memory device, the method comprising: measuring a power supply current of the semiconductor memory device after performing this over the entire address space. (2) The method for testing a semiconductor memory device according to claim 1, wherein the measurement of the power supply current is performed with the semiconductor memory device in a chip non-selection mode.