JPS62266819A - Formation of semiconductor thin film - Google Patents
Formation of semiconductor thin filmInfo
- Publication number
- JPS62266819A JPS62266819A JP11038286A JP11038286A JPS62266819A JP S62266819 A JPS62266819 A JP S62266819A JP 11038286 A JP11038286 A JP 11038286A JP 11038286 A JP11038286 A JP 11038286A JP S62266819 A JPS62266819 A JP S62266819A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- esr
- semiconductor thin
- center density
- ion implantation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 32
- 239000010409 thin film Substances 0.000 title claims abstract description 22
- 230000015572 biosynthetic process Effects 0.000 title 1
- 238000010438 heat treatment Methods 0.000 claims abstract description 8
- 238000000034 method Methods 0.000 claims description 15
- 150000002500 ions Chemical class 0.000 claims description 7
- 238000005468 ion implantation Methods 0.000 abstract description 11
- 238000004435 EPR spectroscopy Methods 0.000 abstract description 8
- 230000000694 effects Effects 0.000 abstract description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 10
- 239000013078 crystal Substances 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000005280 amorphization Methods 0.000 description 4
- 238000000137 annealing Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 239000002245 particle Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 238000004458 analytical method Methods 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 206010052428 Wound Diseases 0.000 description 1
- 208000027418 Wounds and injury Diseases 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 239000003574 free electron Substances 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 238000011282 treatment Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はTPT (薄膜トランジスタ)等の半導体素子
を形成する半導体薄膜の形成方法に関し、特に高易動度
を実現する半導体薄膜の形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming a semiconductor thin film for forming a semiconductor element such as a TPT (thin film transistor), and particularly to a method for forming a semiconductor thin film that achieves high mobility.
本発明は、結晶の成長を行って半導体素子に供する半導
体薄膜を形成する方法において、イオン注入による17
4 fXをESR中心密度で1.03XIQIS個/c
113以上与え且つこれを熱処理することにより、高易
動度の性質を示す薄膜を得るものである。The present invention relates to a method of growing crystals to form a semiconductor thin film for use in semiconductor devices.
4 fX as ESR center density 1.03XIQIS pieces/c
113 or more and heat-treating it, a thin film exhibiting high mobility can be obtained.
一般に、TPT (薄膜トランジスタ)等の半導体素子
に用いるための薄膜半導体層の形成方法として、シリコ
ン基板等の半導体基体或いは絶縁基体上に、例えば多結
晶シリコンをCVD等の方法で被着形成し、アニール等
の熱処理を行ってグレインの成長を促し、易動度の向上
を得ることが行われている。Generally, as a method for forming a thin film semiconductor layer for use in a semiconductor element such as a TPT (thin film transistor), polycrystalline silicon is deposited on a semiconductor substrate such as a silicon substrate or an insulating substrate by a method such as CVD, and then annealed. Heat treatments such as these are used to promote grain growth and improve mobility.
ここで、具体的な数値を提示して説明すると、例えばL
P−CVD法(低圧CVD法)等の方法により被着した
多結晶シリコン層のダレインサイズ(粒径)は、そのま
まの快感では50〜200人程度の大きさであるが、こ
のような多結晶シリコン屓に対して1ooo’c程度の
アニール処理を施した場合には、およそ800人程度ま
でには当該多結晶シリコン層のグレインサイズが成長す
ることになる。Here, if we present and explain specific numerical values, for example, L
The particle size (grain size) of a polycrystalline silicon layer deposited by a method such as the P-CVD method (low pressure CVD method) is about 50 to 200 grains in terms of pleasure. If annealing treatment of about 100'c is applied to the crystalline silicon layer, the grain size of the polycrystalline silicon layer will grow by about 800 people.
しかしながら、素子の高密度化の要請から、チャンネル
長を短くし、或いは半導体薄膜の膜厚を200〜400
人程度の超薄膜にしていったときには、素子特性のばら
つきが顕著になり、単に高易動度を得るためにアニール
等の熱処理を行っても、その再現性が問題となる。However, due to the demand for higher density devices, the channel length must be shortened or the thickness of the semiconductor thin film must be increased from 200 to 400 mm.
When a film is made to be as thin as a human being, variations in device characteristics become noticeable, and even if heat treatment such as annealing is performed simply to obtain high mobility, reproducibility becomes a problem.
また、さらに素子の高性能化を意図した場合にあっては
、一層グレインサイズを大きなものに成長させて高易動
度を実現する必要があり、上述の方法によっては必ずし
もその要求に答えるものとは言い得ない。Furthermore, if the intention is to further improve the performance of the device, it is necessary to grow the grain size to an even larger size to achieve high mobility, and the above-mentioned method will not necessarily meet that requirement. I can't say.
一方、アニール等の熱処理の前にイオン注入を行って、
半導体薄膜を非晶質化させてから、熱処理を行い、グレ
インサイズを大きくする方法も知られている。On the other hand, ion implantation is performed before heat treatment such as annealing,
A method is also known in which a semiconductor thin film is made amorphous and then subjected to heat treatment to increase the grain size.
しかし、イオン注入のドーズ量によって、非晶質化の度
合を定量化することは容易でなく、その再現性に高度な
ものが要求される微細化傾向の中にあっては十分なもの
とは言い得ない。However, it is not easy to quantify the degree of amorphization based on the dose of ion implantation, and it is difficult to quantify the degree of amorphization depending on the dose of ion implantation, and it is difficult to quantify the degree of amorphization due to the trend toward miniaturization, which requires a high degree of reproducibility. I can't say it.
そこで、本発明は上述の問題点に鑑み、何ら素子の再現
性に悪影響を与えることなく高易動度の素子特性を実現
する半導体薄膜の形成方法の提供を目的とする。SUMMARY OF THE INVENTION In view of the above-mentioned problems, the present invention aims to provide a method for forming a semiconductor thin film that achieves high mobility device characteristics without any adverse effect on device reproducibility.
本発明は、半導体層にイオン注入を行ってその損傷をE
SR(電子スピン共鳴)中心密度で1゜03 X 10
IS(II/cI13以上与えた後、熱処理を行う半導
体薄膜の形成方法により上述の問題点を解決する。The present invention performs ion implantation into a semiconductor layer to eliminate damage thereto.
SR (electron spin resonance) center density is 1゜03 x 10
The above-mentioned problems are solved by a method of forming a semiconductor thin film in which heat treatment is performed after applying an IS (II/cI of 13 or more).
例えばシリコンを材料とする半導体層にSi等のイオン
を用いたイオン注入を行うことにより、S i−3i結
合の共有結合が壊されて、ダングリングボンドが増加す
る。このようなダングリングボンドは、自由電子の捕獲
、散乱等に寄与して電気伝導度に影響し、直接的にシリ
コン等の非晶質化の程度を定量めに示すものである。For example, by implanting ions of Si or the like into a semiconductor layer made of silicon, covalent bonds of Si-3i bonds are broken and dangling bonds increase. Such dangling bonds contribute to the capture and scattering of free electrons, affect electrical conductivity, and directly quantify the degree of amorphization of silicon, etc.
このような事実に基づき、本発明は、上記ダングリング
ボンドの量をESR解析を通じて確実に把握し、これを
ESR(電子スピン共鳴)中心密度で1.03XIOl
ツ個/ cs 3以上とすることで、高易動度を実現す
る半導体薄膜を得るものである。Based on these facts, the present invention reliably grasps the amount of the dangling bonds through ESR analysis, and calculates this with an ESR (electron spin resonance) center density of 1.03XIOl.
By setting the number of particles/cs to 3 or more, a semiconductor thin film that achieves high mobility can be obtained.
これはESR中心密度を1.03X101!個/cIm
3以上としたときに、臨界的な電気易動度の向上の現象
を見出すことができ、上記ESR中心密度の値となるよ
うな損傷を与えるイオン注入によって、確実に高易動度
の素子を再現性良く形成することができる。This makes the ESR center density 1.03X101! piece/cIm
When the value is 3 or higher, a phenomenon of critical electrical mobility improvement can be found, and ion implantation that causes damage to the value of the ESR center density described above can reliably create a high mobility element. It can be formed with good reproducibility.
ここで、ESR(電子スピン共鳴)解析は、電子スピン
の低エネルギー状態から高エネルギー状態への遷移を測
定するものであって、縮退している準位が、磁場中にお
いて遷移する現象(ゼーマン効果)をマイクロ波帯のエ
ネルギー(hν)吸収量をもって定量化するものであり
、本発明においては、例えば9.5GHzのマイクロ波
の吸収の強さによって、上記ダングリングボンドの量を
定めることができる。Here, ESR (electron spin resonance) analysis measures the transition of electron spin from a low energy state to a high energy state, and is a phenomenon in which degenerate levels transition in a magnetic field (Zeeman effect). ) is quantified by the amount of energy (hν) absorbed in the microwave band, and in the present invention, the amount of the dangling bonds can be determined by the strength of absorption of microwaves of 9.5 GHz, for example. .
本発明の実施例を実験例に基づき説明する。 Examples of the present invention will be described based on experimental examples.
本実験例の半導体薄膜の形成方法は、まず、半導体層と
して多結晶シリコン層を、LP−CVD法により、61
0℃r S t H4ガスとHeガス(20%)の混
合ガスを使用し、真空度70Pa。The method for forming the semiconductor thin film in this experimental example is to first form a polycrystalline silicon layer as a semiconductor layer using the LP-CVD method.
0℃r S t A mixed gas of H4 gas and He gas (20%) was used, and the vacuum degree was 70 Pa.
堆積レート60〜70人/ m i nの条件でおよそ
800人の程堆積させている。Approximately 800 people were deposited at a deposition rate of 60 to 70 people/min.
次に、このような多結晶シリコン層に対して、導入する
イオンとしてSi(シリコン)イオンを用い、40ke
Vの注入エネルギーで、ドーズ量を次の容量として試料
を作製した。Next, using Si (silicon) ions as ions to be introduced into such a polycrystalline silicon layer, a 40ke
A sample was prepared with an implantation energy of V and a dose amount of the following capacity.
(以下、余白)
第1表
ここで、各試料■〜■については、試料■を除き上記所
定のドーズ量でイオン注入が施されており、このイオン
注入によって、上記多結晶シリコン層はダメージ(損傷
)を受け、多結晶シリコン層中の共有結合が切れて、ダ
ングリングボンドの量が増加することになる。(Hereinafter, blank spaces) Table 1 Here, for each of the samples ■ to ■, except for sample ■, ion implantation was performed at the predetermined dose described above, and as a result of this ion implantation, the polycrystalline silicon layer was damaged ( damage), the covalent bonds in the polycrystalline silicon layer are broken, and the amount of dangling bonds increases.
尚、導入するためのイオンは特にSiイオンに限定され
ず、他の電気的に不活性な元素でも良く、更に他の高エ
ネルギー粒子でも良い。Note that the ions to be introduced are not particularly limited to Si ions, and may be other electrically inactive elements or other high-energy particles.
そして、上述の各ドーズ量に対応するESR中心密度に
ついてそれぞれ測定し、それぞれ次に示す第2表に示す
ような結果が得られている。なお、測定は、マイクロ波
出力8.0mW、磁場掃引中±50mT、変調中6.3
μT、1ilJ定温度−120℃で行ったものである。Then, the ESR center density corresponding to each of the above-mentioned doses was measured, and the results shown in Table 2 below were obtained. The measurement was performed at a microwave output of 8.0 mW, ±50 mT during magnetic field sweep, and 6.3 mT during modulation.
μT, 1ilJ It was conducted at a constant temperature of -120°C.
第2表
このような各ESR中心密度の値は、直接的に試料の多
結晶シリコン層のダングリングボンドの量を代表するも
のであり、次にこのような多結晶シリコン層に対してエ
ツチングにより800人から200人への超薄膜化を図
り、熱処理として600℃程度の低温のアニールを施し
更に1000℃程度の高温のアニールを施した結果、第
1図に示すような易動度とESR中心密度の値の相関関
係が得られている。なお、第1図中、・はサンプリング
点であり、横軸はESR中心密度(fll/cm3)を
示し、また、縦軸は易動度(crm 2 / ’J・5
ec)を示して、上記試料■〜■までのデータに加えて
他のデータをも補完して示している。Table 2 These ESR center density values directly represent the amount of dangling bonds in the polycrystalline silicon layer of the sample. The film was made ultra-thin from 800 to 200, and as a result of heat treatment, it was annealed at a low temperature of about 600°C and then annealed at a high temperature of about 1000°C. As a result, the mobility and ESR center as shown in Figure 1 were reduced. A correlation of density values has been obtained. In Fig. 1, * is the sampling point, the horizontal axis shows the ESR center density (fll/cm3), and the vertical axis shows the mobility (crm2/'J・5).
ec), and in addition to the data of the above samples ① to ②, other data are also supplemented and shown.
第1図に示すように、易動度は、ESR中心密度1.0
3X101ツ (個/備3)のところから臨界的な挙動
を示し、ESR中心密度1.03X1015(個/口3
)以上のESR中心密度の値を有する試料は確実に高易
動度の特性を有することになる。As shown in Figure 1, the mobility is ESR center density 1.0
It shows critical behavior from 3×101 pieces (pieces/piece 3), and the ESR center density is 1.03×1015 (pieces/piece 3).
) A sample having an ESR center density value of greater than or equal to ) will certainly have the property of high mobility.
したがって、上述の実験例からも明らかなように、ES
R中心密度の値は、直接的に半導体薄膜のダングリング
ボンドの量を定量化することができ、第1図に示される
通りESR中心密度1.03 X 1019(([1/
cts3 )以上のESR中心密度の値を有するように
半導体薄膜にイオン注入の損傷を与えることで、確実に
高易動度の素子を再現性良く形成できることになる。Therefore, as is clear from the above experimental example, ES
The value of R center density can directly quantify the amount of dangling bonds in a semiconductor thin film, and as shown in FIG.
By damaging the semiconductor thin film by ion implantation so that it has an ESR center density value of cts3) or more, a high mobility element can be reliably formed with good reproducibility.
ところで、アニールでは、600°C程度の低温のアニ
ールに際に既に、グレインサイズの成長が有り、その値
は2500〜10000人程度に成長している。このと
きは樹枝状の状態であって、その結晶中に所謂ツイン・
ラメラ構造等の多くの結晶欠陥を有してなる多結晶シリ
コン結晶粒を得ることができ、このような結晶のメカニ
ズムを用いることによっても同様の効果をあげることが
可能となり得る。By the way, during annealing at a low temperature of about 600° C., grain size already grows, and the grain size has grown to about 2,500 to 10,000 grains. At this time, it is in a dendritic state, and there are so-called twin crystals in the crystal.
It is possible to obtain polycrystalline silicon crystal grains having many crystal defects such as a lamellar structure, and it may be possible to achieve similar effects by using such a crystal mechanism.
なお、上述の実験例においては、多結晶シリコン層を半
導体層として用いたが、これに限定されず他の材料の半
導体層であっても良い。In addition, in the above-mentioned experimental example, a polycrystalline silicon layer was used as a semiconductor layer, but the semiconductor layer is not limited to this and may be made of other materials.
本発明の半導体薄膜の形成方法は、上述のように、ES
R中心密度の値は、直接的に半導体薄膜のダングリング
ボンドの量を定量化することができ、上記所定のESR
中心密度の値を有するように半導体層にイオン注入のt
i傷を与えることで、確実に高易動度の素子を再現性良
く形成できることになる。As described above, the method for forming a semiconductor thin film of the present invention is based on the ES
The value of the R center density can directly quantify the amount of dangling bonds in the semiconductor thin film, and the value of the R center density can directly quantify the amount of dangling bonds in the semiconductor thin film.
t of ion implantation into the semiconductor layer to have the value of the central density
By providing i-wounds, it is possible to reliably form high-mobility elements with good reproducibility.
第1図は本発明の半導体薄膜の形成方法を説明するため
の実験例に基づ<ESR中心密度と易動度の相関関係を
示す説明図である。
特 許 出 願 人 ソニー株式会社代理人 弁
理士 小池 見間 田村榮−FIG. 1 is an explanatory diagram showing the correlation between ESR center density and mobility based on an experimental example for explaining the method of forming a semiconductor thin film of the present invention. Patent applicant Sony Corporation agent Patent attorney Koike Mima Sakae Tamura
Claims (1)
密度で1.03×10^1^9個/cm^3以上与えた
後、熱処理を行う半導体薄膜の形成方法。A method for forming a semiconductor thin film in which ions are implanted into a semiconductor layer to cause damage to the ESR center density of 1.03×10^1^9 ions/cm^3 or more, and then heat treatment is performed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11038286A JPS62266819A (en) | 1986-05-14 | 1986-05-14 | Formation of semiconductor thin film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11038286A JPS62266819A (en) | 1986-05-14 | 1986-05-14 | Formation of semiconductor thin film |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7145022A Division JP2755214B2 (en) | 1995-06-12 | 1995-06-12 | Method of forming semiconductor thin film |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62266819A true JPS62266819A (en) | 1987-11-19 |
Family
ID=14534389
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11038286A Pending JPS62266819A (en) | 1986-05-14 | 1986-05-14 | Formation of semiconductor thin film |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62266819A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6178120A (en) * | 1984-09-25 | 1986-04-21 | Sony Corp | Manufacture of thin film single crystal |
JPS6178119A (en) * | 1984-09-25 | 1986-04-21 | Sony Corp | Manufacture of semiconductor |
-
1986
- 1986-05-14 JP JP11038286A patent/JPS62266819A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6178120A (en) * | 1984-09-25 | 1986-04-21 | Sony Corp | Manufacture of thin film single crystal |
JPS6178119A (en) * | 1984-09-25 | 1986-04-21 | Sony Corp | Manufacture of semiconductor |
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