JPS6226572B2 - - Google Patents
Info
- Publication number
- JPS6226572B2 JPS6226572B2 JP55140476A JP14047680A JPS6226572B2 JP S6226572 B2 JPS6226572 B2 JP S6226572B2 JP 55140476 A JP55140476 A JP 55140476A JP 14047680 A JP14047680 A JP 14047680A JP S6226572 B2 JPS6226572 B2 JP S6226572B2
- Authority
- JP
- Japan
- Prior art keywords
- flash discharge
- annealing
- semiconductor wafer
- discharge lamp
- mirror
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 235000012431 wafers Nutrition 0.000 claims description 36
- 239000004065 semiconductor Substances 0.000 claims description 30
- 238000000137 annealing Methods 0.000 claims description 24
- 238000000034 method Methods 0.000 description 10
- 238000010586 diagram Methods 0.000 description 9
- 239000002019 doping agent Substances 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
- H01L21/2686—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation using incoherent radiation
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- High Energy & Nuclear Physics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- General Physics & Mathematics (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Recrystallisation Techniques (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Description
【発明の詳細な説明】
本発明は、半導体をアニールするためのアニー
リング装置に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an annealing apparatus for annealing semiconductors.
現在、半導体業界では二つの面でアニーリング
が注目されている。 Currently, annealing is attracting attention in the semiconductor industry for two reasons.
一つは半導体素子の結晶化と新しい機能を持た
せるために例えばSiのウエハーにＰ（りん）を高
エネルギーでイオン注入した時に生ずる結晶損傷
の回復のためのアニーリングである。このアニー
リングで従来最も一般的な方法は、例えば1000℃
の電気炉で乾燥窒素を流しながら30分間加熱する
いわゆる電気炉アニール法であるが、この方法は
簡単ではあるが、(イ)ウエハーに「反り」が生じ、
後続の工程で生産歩留りを低下させる欠点、(ロ)加
熱時間が長いので、ウエハー内部において、注入
イオンの分布が変化する欠点、(ハ)ウエハー表面が
汚染され易い欠点、(ニ)アニール時間が長い欠点等
が指摘され、最近では、上記アニール法に代るも
のとして、レーザ光で短時間照射するアニール法
が研究されている。しかしながら、このレーザ光
によるアニール法も、パルス発振レーザを用いた
場合は(ホ)ウエハーの表面が熔け、液相エピタキシ
アル成長によつて結晶回復は達成されるが、注入
イオンの拡散速度が液相中で極めて大きく、注入
イオンの分布が大巾に変化する欠点、(ヘ)光が単一
波長のため熔融領域に干渉パターンが生じ不均一
な照射となる欠点、連続発振レーザを用いた場合
は(ト)小さなビームスポツトでウエハーを走査する
ことになるが、走査線と走査線との間に生ずる線
状境界区域に、アニールの不充分な部分が生じや
すく、走査線の間隔を小さくすれば時間がかかる
うえに、過剰加熱される部分が生じ易く、走査の
方法と照射の不均一性に難点を含む欠点、(チ)単一
波長のためウエハーの表面で干渉パターンが生じ
不均一な照射となる欠点があり、そしてレーザ光
アニール共通の欠点として、装置が大型、精密と
なる操作、運転に高度な技術が要求される。 One is annealing to recover crystal damage that occurs when, for example, P (phosphorus) is ion-implanted at high energy into a Si wafer in order to crystallize semiconductor devices and add new functions. The conventionally most common method for this annealing is, for example, at 1000°C.
This is the so-called electric furnace annealing method, in which the wafer is heated for 30 minutes while flowing dry nitrogen in an electric furnace.Although this method is simple, (a) it causes ``warpage'' in the wafer;
(2) Disadvantage that the distribution of implanted ions changes inside the wafer due to the long heating time; (C) Disadvantage that the wafer surface is easily contaminated; (D) Annealing time Long disadvantages have been pointed out, and recently, as an alternative to the above-mentioned annealing method, an annealing method in which laser light is irradiated for a short time has been researched. However, in this annealing method using laser light, when a pulsed laser is used, (e) the surface of the wafer melts, and crystal recovery is achieved by liquid phase epitaxial growth, but the diffusion rate of the implanted ions is Disadvantages: The distribution of implanted ions changes widely due to the extremely large size in the phase; (F) Disadvantages of the light having a single wavelength, which causes an interference pattern in the melting region and uneven irradiation; When using a continuous wave laser (g) The wafer is scanned with a small beam spot, but insufficient annealing tends to occur in the linear boundary area between the scan lines, so it is necessary to reduce the spacing between the scan lines. (1) Disadvantages include the fact that it is time consuming, tends to cause overheated areas, and has difficulties with the scanning method and non-uniformity of irradiation; There is a drawback of irradiation, and as a common drawback of laser light annealing, the equipment is large and precise, and advanced technology is required for operation and operation.
他の一つは、例えばSiのウエハーとして、適当
な基板の上にイオン蒸着法によりSiを蒸着し、こ
のSiの蒸着層を、アニール法でエピタキシアル成
長させる場合である。この場合のアニールも、上
記と同様、従来は、電気炉もしくはレーザ光であ
り、上記と同様の欠点が指摘されている。 Another method is to deposit Si on a suitable substrate, such as a Si wafer, by ion evaporation, and then epitaxially grow the deposited Si layer by annealing. Conventionally, an electric furnace or laser light is used for annealing in this case as well, and the same drawbacks as above have been pointed out.
本発明の目的は、半導体ウエハーをアニールす
るための新規なアニーリング装置を提供すること
にあり、
その構成上の特徴は、半導体アニーリング装置
が、半導体ウエハー用試料台と、この試料台に半
導体ウエハーが載せられた時その半導体ウエハー
の上面を取り囲むように配置された複数の閃光放
電灯と、該全ての閃光放電灯に近接して沿つて、
かつ該試料台と反対側に配置された一枚のミラー
とを含み、半導体ウエハー表面の反射光を該ミラ
ーにて再反射して多重照射することにある。 An object of the present invention is to provide a novel annealing apparatus for annealing semiconductor wafers.The semiconductor annealing apparatus has a structure including a semiconductor wafer sample stage, and a semiconductor wafer mounted on the sample stage. a plurality of flash discharge lamps disposed so as to surround the upper surface of the semiconductor wafer when mounted; and closely along all of the flash discharge lamps;
The device also includes a mirror disposed on the opposite side of the sample stage, and the reflected light from the semiconductor wafer surface is re-reflected by the mirror for multiple irradiation.
以下、図面を参照しながら本発明を説明する。 The present invention will be described below with reference to the drawings.
第１図は本発明に使用する閃光放電灯の一例の
説明図であつて、１は一対の電極、L1はアーク
長、D1，D2は夫々バルブ２の外径、内径を示
す。 FIG. 1 is an explanatory diagram of an example of a flash discharge lamp used in the present invention, in which 1 indicates a pair of electrodes, L 1 indicates an arc length, and D 1 and D 2 indicate an outer diameter and an inner diameter of a bulb 2, respectively.
第２図は本発明の一例の説明図であつて、閃光
放電灯３の長手方向から見た断面を示し、試料台
４に半導体ウエハー５を載せ、この半導体ウエハ
ー５る取り囲むように閃光放電灯３を近密に配置
し、更に、試料台４と反対側に近接して一枚のミ
ラー６を配置する。 FIG. 2 is an explanatory diagram of an example of the present invention, showing a cross section of the flash discharge lamp 3 viewed from the longitudinal direction. A semiconductor wafer 5 is placed on the sample stage 4, and the flash discharge lamp 3 are placed closely together, and one mirror 6 is placed close to the sample stage 4 on the opposite side.
設計した数値例を示すと、ミラー６は、樋状を
しており、断面の円弧は直径約160mmであつて、
そのミラー６の面から約５mm離して（H2＝５
mm）、外径D1が10mm内径D2が８mm、アーク長L1が
150mmの閃光放電灯を近接して弧状に配置する。
この場合照射巾L2は大体130mmである。そして、
試料台４は、一番下方に位置する閃光放電灯から
10mm離間して配置し（H1＝10mm）、この試料台４
の中心に、４インチシリコンウエハー５を載せる
と、大体閃光放電灯の配置された円弧θの範囲内
となる。したがつて、閃光放電灯群による光源面
の広さは、シリコンウエハー側から見て約150mm
×130mmとなる。 To show a designed numerical example, the mirror 6 has a gutter shape, and the arc of the cross section is approximately 160 mm in diameter.
At a distance of about 5 mm from the surface of mirror 6 (H 2 = 5
mm), outer diameter D 1 is 10 mm, inner diameter D 2 is 8 mm, arc length L 1 is
150mm flash discharge lamps are placed close together in an arc.
In this case, the irradiation width L 2 is approximately 130 mm. and,
Sample stage 4 is placed from the flash discharge lamp located at the bottom.
This sample stage 4 was placed 10 mm apart (H 1 = 10 mm).
If a 4-inch silicon wafer 5 is placed at the center of the wafer, it will be within the range of the circular arc θ where the flash discharge lamp is placed. Therefore, the area of the light source area created by the group of flash discharge lamps is approximately 150 mm when viewed from the silicon wafer side.
×130mm.
ところで、半導体ウエハーを普通のキセノンラ
ンプや閃光放電灯でアニールする場合、半導体ウ
エハーの表面が鏡面加工されているので、かなり
の入射光が反射され、したがつて、必要以上に多
くの光を照射する必要があるが、上記の如く、半
導体ウエハー５とミラー６とが閃光放電灯を介し
て取り囲むように近接配置されていると、半導体
ウエハー５によつて反射された光がミラー６によ
つて再反射され、これの繰り返しによる多重反射
効果が生じて、閃光放電灯群からの放射光は極め
て効率よく利用できる。 By the way, when a semiconductor wafer is annealed using an ordinary xenon lamp or flash discharge lamp, the surface of the semiconductor wafer is mirror-finished, so a considerable amount of incident light is reflected, and therefore more light than necessary is irradiated. However, if the semiconductor wafer 5 and the mirror 6 are placed close to each other so as to surround each other via the flash discharge lamp as described above, the light reflected by the semiconductor wafer 5 is reflected by the mirror 6. The light emitted from the flash discharge lamp group can be used extremely efficiently by being re-reflected and repeating this process to create a multiple reflection effect.
さて、上記半導体アニーリング装置で、シリコ
ンウエハーにドープ材として、りんを100Kエレ
クトロンボルトのエネルギーで２×1015原子／cm2
注入したサンプルを、あらかじめ電気炉で400℃
程度に予備加熱した昇温状態で、閃光放電灯１本
当りの発光エネルギーを5000ジユール、パルス巾
（1/2波高長）を200μsec.で発光照射せしめる
と、十分なアニールができる。予備加熱として
400℃程度昇温させるだけでは、半導体ウエハー
の「反り」も生じないし、アニールもできないか
わりにドープ材の再拡散等も生ぜず、あくまで
も、閃光照射によるアニールの補助的加熱であ
り、大体400℃以下であれば半導体ウエハーに悪
影響を与えることなく、閃光照射による半導体ウ
エハーの瞬間昇温、瞬間アニールの補助的加熱の
役目を果す。ここにおいて、アニールが十分でき
たかどうかについてはドーピング効率で調べるも
のであるが、上記例でドーピング効率が90％であ
る。 Now, using the semiconductor annealing equipment mentioned above, phosphorus was added as a dopant to the silicon wafer at an energy of 100K electron volts at 2×10 15 atoms/cm 2 .
The injected sample was heated to 400℃ in an electric furnace in advance.
Sufficient annealing can be achieved by preheating to a certain degree and emitting light at a temperature of 5,000 joules per flash discharge lamp and a pulse width (1/2 wave length) of 200 μsec. as preheating
Raising the temperature to around 400°C will not cause any "warping" of the semiconductor wafer, nor will it cause any re-diffusion of the dope, although it cannot be annealed.It is merely a supplementary heating for annealing using flash irradiation, and the temperature will rise to around 400°C. If the following conditions are met, flash irradiation can serve as instantaneous temperature rise of the semiconductor wafer and supplementary heating for instantaneous annealing without adversely affecting the semiconductor wafer. Here, whether or not the annealing has been sufficiently performed is checked by doping efficiency, and in the above example, the doping efficiency is 90%.
閃光照射の強さとドーピング効率との関係につ
いては、注入ドープ材の濃度によつて変化し、上
記のように、２×1015原子／cm2の場合は、かなり
強い閃光照射を必要とするが、ドープ材濃度が
1014のような低いオーダーでは、閃光放電灯の発
光照射のエネルギーはもつと低くても良い。 The relationship between the intensity of flash irradiation and doping efficiency changes depending on the concentration of the implanted dopant, and as mentioned above, in the case of 2 × 10 15 atoms/cm 2 , a fairly strong flash irradiation is required. , the dopant concentration is
On the low order of magnitude, such as 10 14 , the energy of the flash discharge lamp's luminescent radiation may be even lower.
以上のように、閃光放電灯１本当りのエネルギ
ー値や、全体として何本の閃光放電灯にするか
は、ドープ材の種類、量、注入時のエネルギー等
を考慮して決めて良い。 As described above, the energy value of one flash discharge lamp and the total number of flash discharge lamps to be used may be determined by taking into consideration the type and amount of dopant, the energy at the time of injection, etc.
しかしいづれの場合も、半導体ウエハーの表面
が鏡面加工されていることから、半導体ウエハー
を取り囲むように近密に配置された複数の閃光放
電灯を挾んでミラーと協同して多重反射効果が十
分利用できるよう半導体ウエハーが近接配置され
ることが重要である。そして、近密に配置された
複数の閃光放電灯は実質上強力な閃光面光源を形
成し、広い面積の半導体ウエハーの全域を均一に
瞬時にアニールすることができるので、従来の半
導体アニーリング装置やアニール方法が有する欠
点を解消できる。 However, in either case, since the surface of the semiconductor wafer is mirror-finished, multiple flash discharge lamps placed closely surrounding the semiconductor wafer are sandwiched in between and cooperate with mirrors to fully utilize the multiple reflection effect. It is important that the semiconductor wafers be placed as close together as possible. The multiple flash discharge lamps arranged closely together form a substantially powerful flash surface light source, and can instantly and uniformly anneal a wide area of a semiconductor wafer. The drawbacks of the annealing method can be overcome.
尚、他の実施例について説明すると次の通りで
ある。 Note that other embodiments will be explained as follows.
(1) 第４図は、円弧状に屈曲した発光部３ａを有
する閃光放電灯の説明図であつて、順次弧の小
さい発光部３ａを有する複数の閃光放電灯を近
密に配設し、第５図の如くお椀状のミラー６と
組み合せて、それによつて半導体ウエハー５を
取り囲んでも良いこと。(1) FIG. 4 is an explanatory diagram of a flash discharge lamp having a light emitting part 3a bent in an arc shape, in which a plurality of flash discharge lamps each having a light emitting part 3a with a sequentially smaller arc are closely arranged, It is also possible to surround the semiconductor wafer 5 by combining it with a bowl-shaped mirror 6 as shown in FIG.
(2) ミラー６の面は、第３図（樋状）、第６図
（お椀状）に示すように、閃光放電灯のバルブ
の形状に沿つた凹凸６ａを具えていても良いこ
と。(2) The surface of the mirror 6 may be provided with unevenness 6a that follows the shape of the bulb of the flash discharge lamp, as shown in FIG. 3 (trough-shaped) and FIG. 6 (bowl-shaped).
(3) 閃光放電灯群が半導体ウエハーを取り囲む全
体の形状は、第２図では「カマボコ形」、第４
図では「お椀形」であるが、他の例としては、
「ピラミツド形」を形成するよう構成しても良
いこと。(3) The overall shape of the group of flash discharge lamps surrounding the semiconductor wafer is "cylindrical" in Figure 2,
In the figure, it is “bowl-shaped”, but as another example,
It may be configured to form a "pyramid shape".
などである。etc.
第１図は本発明に使用する閃光放電灯の一例の
説明図、第２図は本発明の一例の説明図、第３図
と第６図は他の例のミラーの説明図、第４図は他
の閃光放電灯の説明図、第５図は本発明の他の例
の説明図である。
図において、３は閃光放電灯、５は半導体ウエ
ハー、６はミラーを示す。
Fig. 1 is an explanatory diagram of an example of a flash discharge lamp used in the present invention, Fig. 2 is an explanatory diagram of an example of the present invention, Figs. 3 and 6 are explanatory diagrams of other examples of mirrors, and Fig. 4 is an explanatory diagram of an example of a flash discharge lamp used in the present invention. 5 is an explanatory diagram of another flash discharge lamp, and FIG. 5 is an explanatory diagram of another example of the present invention. In the figure, 3 is a flash discharge lamp, 5 is a semiconductor wafer, and 6 is a mirror.
Claims (1)
導体ウエハーが載せられた時その半導体ウエハー
の上面を取り囲むよう配置された複数の閃光放電
灯と、該全ての閃光放電灯に近接して沿つて、か
つ該試料台と反対側に配置された一枚のミラーと
を含み、半導体ウエハー表面の反射光を該ミラー
にて再反射して多重照射することを特徴とする半
導体アニーリング装置。1. A sample stage for semiconductor wafers, a plurality of flash discharge lamps arranged to surround the top surface of the semiconductor wafer when the semiconductor wafer is placed on the sample stage, and adjacent to and along all of the flash discharge lamps, A semiconductor annealing apparatus comprising: a mirror disposed on the opposite side of the sample stage; the semiconductor wafer surface re-reflects light reflected from the mirror for multiple irradiation.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14047680A JPS5764937A (en) | 1980-10-09 | 1980-10-09 | Annealing device |
| DE19813139712 DE3139712C2 (en) | 1980-10-09 | 1981-10-06 | Annealing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14047680A JPS5764937A (en) | 1980-10-09 | 1980-10-09 | Annealing device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5764937A JPS5764937A (en) | 1982-04-20 |
| JPS6226572B2 true JPS6226572B2 (en) | 1987-06-09 |
Family
ID=15269487
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14047680A Granted JPS5764937A (en) | 1980-10-09 | 1980-10-09 | Annealing device |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPS5764937A (en) |
| DE (1) | DE3139712C2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0618668U (en) * | 1992-03-27 | 1994-03-11 | 吉則 高田 | Hydraulic pressure flow converter |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS593934A (en) * | 1982-06-30 | 1984-01-10 | Ushio Inc | Heating of semiconductor wafer with light irradiation |
| JPS593933A (en) * | 1982-06-30 | 1984-01-10 | Ushio Inc | Heating of semiconductor wafer with light irradiation |
| JPS59177937U (en) * | 1983-05-16 | 1984-11-28 | 富士通株式会社 | Infrared heat treatment equipment |
| JPS6049625U (en) * | 1983-09-13 | 1985-04-08 | ニチデン機械株式会社 | infrared heating device |
| US4560420A (en) * | 1984-06-13 | 1985-12-24 | At&T Technologies, Inc. | Method for reducing temperature variations across a semiconductor wafer during heating |
| US4981815A (en) * | 1988-05-09 | 1991-01-01 | Siemens Aktiengesellschaft | Method for rapidly thermally processing a semiconductor wafer by irradiation using semicircular or parabolic reflectors |
| DE4109956A1 (en) * | 1991-03-26 | 1992-10-01 | Siemens Ag | METHOD FOR SHORT-TEMPERATURE A SEMICONDUCTOR DISC BY IRRADIATION |
| JP2006261695A (en) * | 2006-05-22 | 2006-09-28 | Toshiba Corp | Manufacturing method of semiconductor device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4824179U (en) * | 1971-07-29 | 1973-03-20 | ||
| JPS5334302B2 (en) * | 1972-02-20 | 1978-09-20 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5715814Y2 (en) * | 1976-08-26 | 1982-04-02 | ||
| JPS5575224A (en) | 1978-12-01 | 1980-06-06 | Ushio Inc | Annealing furnace |
| JPS5750427A (en) * | 1980-09-12 | 1982-03-24 | Ushio Inc | Annealing device and annealing method |
-
1980
- 1980-10-09 JP JP14047680A patent/JPS5764937A/en active Granted
-
1981
- 1981-10-06 DE DE19813139712 patent/DE3139712C2/en not_active Expired
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4824179U (en) * | 1971-07-29 | 1973-03-20 | ||
| JPS5334302B2 (en) * | 1972-02-20 | 1978-09-20 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0618668U (en) * | 1992-03-27 | 1994-03-11 | 吉則 高田 | Hydraulic pressure flow converter |
Also Published As
| Publication number | Publication date |
|---|---|
| DE3139712A1 (en) | 1982-05-13 |
| JPS5764937A (en) | 1982-04-20 |
| DE3139712C2 (en) | 1984-10-18 |
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