JPS6225253B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for vapor phase reaction of a semiconductor substrate,
In particular, it provides an improved method of gas phase reactions performed on semiconductor substrates in a gas phase reaction vessel.

In manufacturing an example of a semiconductor device, there is a step of subjecting a semiconductor substrate to a reaction in a gas phase, forming an oxide film on its surface, diffusing impurities to form a region, and the like.

The above process will be explained with reference to the manufacturing process of an example of a P-channel enhancement type MOS-FET. Figure 1 shows a cross-sectional view of a part of the above MOS-FET,
1 is an N-type silicon substrate with a specific resistance value of 1 to 10 Ωcm;
2 is a source region, and 3 is a drain region, both of which are formed by selectively diffusing P-type impurities using the SiO ₂ layer 4 formed on one main surface of the substrate as a mask. Further, 12 is a source electrode provided on the exposed surface of the source region, 13 is a drain electrode provided on the exposed surface of the drain region, and 15 is a gate electrode, which is provided on the main surface of the substrate between the source region and the drain region. It is formed with an oxide film 5 interposed therebetween. The operation forms a depletion layer and an inversion layer, but the interface between the silicon substrate and the SiO ₂ in contact with it has a very complex appearance, and the Si-SiO ₂ interface is a metal (electrode)-oxide layer. - Induction of charge due to the work function difference (φ _MS ) between semiconductors, crystal misalignment caused by discontinuity due to the difference in crystal structure between oxide and semiconductor, impurities present in the oxidized part during high-temperature oxidation,
It becomes abnormal due to the diffusion of O ₂ into Si. Furthermore, contamination caused by impurities that inadvertently attach to SiO ₂ during the processing process can cause surface defect layers, SiO ₂
It exists in the form of a charged body and has a large effect on the electronic state of the Si surface, which in turn poses a problem to the stability of the FET. Based on the above reasons, careful handling is required during the manufacturing process, and
In general, a high-purity quartz tube is used as a reaction vessel due to the contamination of undesirable impurities and heat resistance due to vapor phase growth such as oxide layer formation and impurity diffusion in the manufacture of MOS-FETs and MOS-ICs. ing. As shown in FIG. 2, there is a gas introduction section for forming a reaction atmosphere at one end of the quartz tube 6 (excluding a part of the gas introduction tube 7, the gas source, gas amount adjustment device, etc. are not described). (omitted) 6, the other end of which is open, into which a semiconductor substrate support jig 18 supporting a semiconductor substrate 8 is inserted. This loading is performed using a semiconductor substrate support jig moving rod 9 (hereinafter abbreviated as moving rod). Note that the moving rod has a "key portion" formed at its tip so that it can also be used to take out the semiconductor substrate support jig. The above semiconductor substrate is energized by a high frequency coil surrounding the quartz tube.
It is heated by a soaking tube and subjected to a gas phase reaction in a predetermined atmosphere. When the reaction is completed and the temperature is lowered, the moving rod is inserted and operated (removed) as shown in Figure 3, but the outside air (air) is removed from the container.
flows in by convection.

The above causes Qss to warp on the semiconductor substrate.
(Surface State) increases. The above-mentioned warping has the disadvantage that, for example, the precision of the pattern is reduced due to poor press-fitting of the mask during photolithography, and fine patterning is impaired. Furthermore, an increase in Qss has a serious drawback in that it deteriorates the layer quality of an example of a SiO ₂ layer formed on a semiconductor substrate. In addition, the above Qss
represents the effective total charge present in the interface system, and is expressed by the following formula: Qss = Vss × Cox. However, in the above equation, Cox represents the charge capacity of the oxide film, and Vss≡Vth-V _I th, where Vth represents the "threshold voltage" and V _I th represents the "intrinsic threshold voltage."

The present invention provides a method for vapor phase reaction of semiconductor substrates that eliminates the drawbacks of the conventional vapor phase reaction methods described above.

A method for vapor phase growth of a semiconductor substrate according to the present invention includes the steps of: loading a semiconductor substrate support jig in which a semiconductor substrate is supported into a vapor phase reactor for semiconductor substrates from the open end of the reactor; a step of heating the semiconductor substrate to a predetermined atmosphere and subjecting it to a gas phase reaction; and once the gas phase reaction is completed, the semiconductor substrate is passed through a semiconductor substrate support jig in which the semiconductor substrate is supported at the open end of the reaction vessel; and a step of inserting a rod for moving a semiconductor substrate support jig into the aperture and taking out the semiconductor substrate together with the support jig from the aperture. do.

Next, the present invention will be described as an example of a MOS IC and a MOS FET.
This will be explained in detail by illustrating manufacturing. As shown in FIG. 4, a gas introduction section for forming a reaction atmosphere at one end of the quartz tube 6 (excluding some gas introduction tubes, descriptions of gas sources, gas amount adjustment devices, etc. are omitted). ) 7, the other end of which is open, into which a semiconductor substrate support jig 18 supporting a semiconductor substrate 8 is inserted. This charging is carried out using the moving rod 9. The above-mentioned moving rod has a "key part" at the tip so that it can be used to take out the semiconductor substrate support jig.
is formed. The semiconductor substrate is heated by a high-frequency coil surrounded by a quartz tube, heated by a soaking tube, and subjected to a gas phase reaction in a predetermined atmosphere. Once the reaction is complete, the lid will open as shown in Figure 5.
10 is attached to the open end of the quartz tube 6. The lid body is made of the same material as the quartz tube, and the quartz tube 6
, a closed end face 10b, and an opening 10c through which a semiconductor substrate support jig 8 provided on the end face and supporting a semiconductor substrate can pass through. As an example, a rectangular opening size of 70 mm x 70 mm is suitable. Once the temperature has fallen to a predetermined temperature, the moving rod 9 is inserted through the opening as shown in FIG. 6, and the semiconductor substrate support jig is pulled out using the "key" at the end.

According to the present invention, it is possible to prevent convection of outside air from flowing into the reaction vessel, so that Qss
This has the distinct advantage of preventing an increase in The warpage, for example, is caused by poor press-fitting of a mask during photolithography, which reduces pattern accuracy and impairs fine patterning. Also, the increase in Qss is MOS
This impairs the electrical characteristics of FETs and MOS ICs. That is, when looking at the Vth value of a MOS IC, the variation in the Vth value, which was conventionally ±0.36V, was reduced to ±0.12V when the method of the present invention was used, and a remarkable improvement in the electrical characteristics was observed. Note that the present invention also has the advantage of being extremely easy to implement.

[Brief explanation of the drawing]

Figure 1 is a cross-sectional view of a part of a MOS FET, Figure 2 is a cross-sectional view of a part of a semiconductor substrate vapor phase reaction device, and Figure 3 is a cross-sectional view of a part of a semiconductor substrate vapor phase reaction device.
The figure is a sectional view for explaining the operation of the apparatus shown in Fig. 2, FIG. 4 is a sectional view of the apparatus for explaining the gas phase reaction method according to one embodiment of the present invention, and FIG. A perspective view of an apparatus for explaining an example method. FIG. 6 is a perspective view showing a part of an apparatus for explaining a method according to an embodiment of the present invention. Note that the same reference numerals in the drawings indicate the same or corresponding parts, respectively. 6... Quartz tube (reaction vessel), 8... Semiconductor substrate, 9... Rod for moving semiconductor substrate support jig, 10
...Quartz tube lid, 10c...Lid opening,
18...Semiconductor substrate support jig.

Claims (1)

[Claims] 1. A step of inserting a semiconductor substrate support jig in which a semiconductor substrate is supported into the container from the open end of a vapor phase reaction container for semiconductor substrates, and heating the semiconductor substrate after creating a predetermined atmosphere in the reaction container. and a step of attaching a lid having an opening through which a semiconductor substrate support jig in which a semiconductor substrate is supported is passed through the open end of the reaction container after the gas phase reaction is completed. . A method for vapor phase reaction of a semiconductor substrate, comprising the steps of inserting a rod for moving a semiconductor substrate support jig through the opening and taking out the semiconductor substrate together with the support jig from the opening.