JPS62249495A - Semiconductor laser device - Google Patents

Semiconductor laser device

Info

Publication number
JPS62249495A
JPS62249495A JP9206986A JP9206986A JPS62249495A JP S62249495 A JPS62249495 A JP S62249495A JP 9206986 A JP9206986 A JP 9206986A JP 9206986 A JP9206986 A JP 9206986A JP S62249495 A JPS62249495 A JP S62249495A
Authority
JP
Japan
Prior art keywords
type
layer
semiconductor
semiconductor laser
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9206986A
Other languages
Japanese (ja)
Other versions
JPH0669113B2 (en
Inventor
Satoru Todoroki
轟 悟
Masakazu Ishino
正和 石野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP61092069A priority Critical patent/JPH0669113B2/en
Publication of JPS62249495A publication Critical patent/JPS62249495A/en
Publication of JPH0669113B2 publication Critical patent/JPH0669113B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To improve electrical and optical characteristics and make manufacture easy by a method wherein a laminated structure is composed of a semiconductor layer which has an optional forbidden band width and semiconductor layers which have larger forbidden band widths than the former one which hold the former one between them and the laminated structure is made to grow successively on a semiconductor substrate which has electrical and optical properties different from those of the semiconductor layers and the laminated structure and the semiconductor substrate are unified. CONSTITUTION:An N-type Ga1-xAlxAs cladding layer 2, an N-type or P-type Ga1-yAlyAs active layer 3 (x>y) and a P-type Ga1-xAlxAs cladding layer 4 are successively formed on an N-type silicon crystal substrate 1 by MO-CVD or MBE. Then an oxide film 5, which has a predetermined stripe shape aperture, is formed on the P-type Ga1-xAlxAs cladding layer 4 by CVD and is operated as a current limiting layer. Then metal electrodes 6 are formed on the silicon crystal substrate 1 and on the oxide film 5 by vacuum evaporation and the whole structure is cleft into predetermined dimensions to form a semiconductor laser. With this constitution, highly accurate alignument between the laminated structure and a submount can be eliminated and the productivity and yield of the semiconductor device can be improved.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体レーザ装置に係り、特に、半導体レーザ
チップとヒートン/りとを一体形成することにより、安
価な半導体レーザ装置を提供するにある。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor laser device, and in particular to providing an inexpensive semiconductor laser device by integrally forming a semiconductor laser chip and a heaton/liquid. .

〔従来の技術〕[Conventional technology]

コンパクトディスク、ビデオディスク等の光源として使
用される半導体レーザ装置は、従来1次のように作られ
ていた。すなわち、GaA z系の半導体レーザ装置を
例に取れば、を型GaAs基板上にル型Ga1−xAL
xAzクラッド層、ル型またはp型Gα+−yfiJ、
yAz活性層Cs:>y)rp型Ga + −z An
 x /(Jlクラッド層、F&型Ga A zキャラ
プ層とを液相エピタキシャル成長法を用いて連続成長し
たのち、ル型GaAsキャップ層を貫き、P型GcL、
−エM工A、クラッド層の一部に達する深さの拡散層を
設けて、ル型GαAs基板とル型GaAsキャップ廖と
の表面に電極を被着して、半導体レーザテップが出来上
がる。しかるのち、前記半導体レーザチップをシリコン
サブマウ/トあるいはヒートン/りに半田接続し、半導
体レーザ装置が完成する。なお、この種の装置に関連す
るものには例えば、特公昭57−49156号、特公昭
57−22428号、特公昭57−32518号等が挙
られる。
Semiconductor laser devices used as light sources for compact discs, video discs, etc. have conventionally been manufactured in a first-order manner. In other words, if we take a GaAs z-based semiconductor laser device as an example, a type Ga1-xAL is formed on a GaAs substrate.
xAz cladding layer, type or p type Gα+-yfiJ,
yAz active layer Cs:>y) rp type Ga + -z An
x/(Jl cladding layer, F& type GaAz cap layer are successively grown using the liquid phase epitaxial growth method, then P type GcL, P type GcL,
-EM Process A: A semiconductor laser tip is completed by providing a diffusion layer deep enough to reach a part of the cladding layer and depositing electrodes on the surfaces of the square-shaped GaAs substrate and the square-shaped GaAs cap. Thereafter, the semiconductor laser chip is soldered to a silicon submount or heat exchanger to complete a semiconductor laser device. Incidentally, examples related to this type of device include Japanese Patent Publication No. 49156/1982, Japanese Patent Publication No. 22428/1982, and Japanese Patent Publication No. 32518/1989.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記従来技術において、ル型またはp型Gα1−yfi
iyAz活性層を挟むル型またはP型Ga + −z 
Alz 、4#クラッド層とから成る積層体を極めて高
価なル型GaAJ−基板上に成長しなければならない。
In the above prior art, type or p type Gα1-yfi
iyAz active layer sandwiched between Le type or P type Ga + -z
A stack consisting of Alz, 4# cladding layer must be grown on a very expensive square GaAJ-substrate.

また、400μnX3QQμmに細分化した半導体レー
ザテップをシリコンサブマウントあるいはヒートン/り
上に前記半導体レーザチップの弁開面(光出射面)とサ
ブマウントするいはヒートシンクの端面とが一致し、か
つ平行になる様に半田接続しなければ。
In addition, the semiconductor laser tip, which has been subdivided into 400 μn x 3 QQ μm, is placed on a silicon submount or a heat sink so that the valve opening surface (light emitting surface) of the semiconductor laser chip and the submount or the end surface of the heat sink coincide and are parallel to each other. You have to make solder connections like this.

半導体レーザテップの弁開面から出射した光がサブマウ
ントsるいはヒートシンク表面で乱反射することにより
、出射ビーム形状及びその方向が変化してしまうという
不具合が生じ、経時的にも安定で、良好な電気的光学的
特性を呈することができない。またこれらは歩留り向上
2合理化、低コスト化の最大のネックとなっていた。
The light emitted from the valve opening surface of the semiconductor laser tip is diffusely reflected on the submount S or the heat sink surface, causing a problem in which the emitted beam shape and its direction change. cannot exhibit typical optical properties. Moreover, these have become the biggest bottleneck in improving yield, streamlining, and lowering costs.

本発明の目的は電気的光学的特性に優れ、かつ製造が容
易で、安価な新規の半導体レーザ装置を提供するにある
An object of the present invention is to provide a new semiconductor laser device that has excellent electrical and optical characteristics, is easy to manufacture, and is inexpensive.

〔問題点を解決するための手段〕[Means for solving problems]

上記目的は、任意の禁制帯幅を有する半導体層を、上記
の禁制帯幅より犬ぎい禁制帯幅を有する半導体層で挟ん
で成る積層体構造を、前記の半導体層とは電気的光学的
に性質の異なる半導体基板上に、連続的に成長させ、前
記の積層体構造と、半導体基板とを一体形成することに
より、達成される。
The above object is to create a laminate structure in which a semiconductor layer having an arbitrary forbidden band width is sandwiched between semiconductor layers having a forbidden band width slightly larger than the above-mentioned forbidden band width, which is electrically and optically different from the semiconductor layer. This is achieved by successively growing semiconductor substrates with different properties and integrally forming the above-mentioned laminate structure and the semiconductor substrate.

〔作用〕[Effect]

積1体構造とは電気的光学的に性質の異なり、熱伝導率
に優れた物質を半導体基板として用い。
The semiconductor substrate is made of a material that has different electrical and optical properties from the monolithic structure and has excellent thermal conductivity.

上記半導体基板上に前記積層体構造を一体形成すること
により、半導体基板はサブマウントあるいはヒートシン
クとしての役割を果たす。それによって、積層体構造と
半導体基板とを一体形成してなる半導体レーザ装置では
サブマウントするいはヒートン/りとの高精度位置合わ
せが不要となりまた。半導体レーザ装置の弁開面から出
射した光がサブマウントあるいはヒートシンク表面の影
響をうけることなく、良好な電気的光学的特性を発揮す
ることができる。
By integrally forming the laminate structure on the semiconductor substrate, the semiconductor substrate functions as a submount or a heat sink. As a result, in a semiconductor laser device in which a laminate structure and a semiconductor substrate are integrally formed, there is no need for a submount or high precision alignment with a heaton/retard. Light emitted from the valve opening surface of the semiconductor laser device can exhibit good electrical and optical characteristics without being affected by the submount or heat sink surface.

〔実施例〕〔Example〕

以下、本発明の一実施例をシリコン基板及びGaMAs
系成長層の場合について、第1図を用いて説明する。
Hereinafter, one embodiment of the present invention will be described using a silicon substrate and GaMAs.
The case of a system growth layer will be explained using FIG. 1.

GaAs結晶(熱伝導率0.8 W/cm ・K )よ
りも1桁以上の良好な熱伝導性を示すル型シリコン結晶
基板(熱伝導率1.5 W/1.、、 、 z ) 1
上に、ル型Ga1−xAlzAzクラッド層2と、ル型
またはP型Ga + −y M、’/Ax活性層3 (
x>y>と、P型Ga1−s:Als:Asクラッド層
4とを、良く知られりNo−CVD法(JfgtaLO
r、qanic Chemical Vapor De
position )あるいはMBE法(Mo1ecu
lar Bgam Epitas:y )を用いて。
Le-shaped silicon crystal substrate (thermal conductivity 1.5 W/1., , z ) that exhibits thermal conductivity that is one order of magnitude better than GaAs crystal (thermal conductivity 0.8 W/cm ・K ) 1
On top, there is a Le-type Ga1-xAlzAz cladding layer 2 and a Le-type or P-type Ga + -y M,'/Ax active layer 3 (
x>y> and the P-type Ga1-s:Als:As cladding layer 4 using the well-known No-CVD method (JfgtaLO
r, quanic Chemical Vapor De
position) or MBE method (Mo1ecu
lar Bgam Epitas:y).

連続的に積層する。次に、前記p型Gα1−xfiJt
seAzり、?ラド層4上に、所定のストライプ状開口
を有する酸化膜5をCVD法で設け、電流制限層として
作用させる。しかるのち、前記シリコ/結晶基板1及び
、酸化膜5上に金属電極6を真空蒸着法を用いて被着し
、所定の寸法で弁開することにより半導体レーザ装置が
出来上がる。
Continuously layer. Next, the p-type Gα1-xfiJt
seAzri,? An oxide film 5 having predetermined stripe-shaped openings is provided on the RAD layer 4 by the CVD method to function as a current limiting layer. Thereafter, a metal electrode 6 is deposited on the silicon/crystal substrate 1 and the oxide film 5 using a vacuum evaporation method, and the valve is opened to a predetermined dimension, thereby completing a semiconductor laser device.

酸化膜5を用いて設けた電流制限層は、所定のストライ
プ状開口を除いたP型Gα+ −x Mx Aj クラ
ッド層4上にプロトン照射等による絶縁領域を。
The current limiting layer formed using the oxide film 5 is formed by forming an insulating region on the P-type Gα+ −x Mx Aj cladding layer 4 excluding predetermined striped openings by irradiating protons or the like.

前記シリコン結晶基板1の一部に達する深さまで設ける
ことでも実現できる。
This can also be achieved by providing the layer to a depth that reaches a part of the silicon crystal substrate 1.

≠牟#ヰ なお、上記積層体構造2〜4とシリコ/基板1との間に
組成比2及び結晶成長条件を最適にして成長させたGa
4−Z AlzAzバッファ層を挿入することで、前記
クラッド層をシリコン基板との格子定数の違いによって
発生する結晶欠陥(多くの場合にはミスフィツト転位)
を緩和させることができ。
≠㉟#ヰ Note that Ga was grown with the composition ratio 2 and crystal growth conditions optimized between the above-mentioned laminate structures 2 to 4 and the silicon/substrate 1.
4-Z By inserting the AlzAz buffer layer, the cladding layer is free from crystal defects (in many cases misfit dislocations) that occur due to the difference in lattice constant from the silicon substrate.
can be relieved.

信頼性向上を図ることができる。Reliability can be improved.

一方1Gα1−1N、zAzバッファ層の構造を結晶成
長条件を変えて(成長基板温度を下げる等)アモルファ
スGσAt結晶にしても、また、結晶成長方法を変えて
、少なくとも2層以上のGaAs及びAIAJとから成
る超格子層構造にしても、前記Gα1−zMzA」バッ
ファ層の場合同様に活性層への結晶欠陥導入を防ぐこと
ができる。
On the other hand, even if the structure of the 1Gα1-1N, zAz buffer layer is changed to an amorphous GσAt crystal by changing the crystal growth conditions (lowering the growth substrate temperature, etc.), it is also possible to change the structure of the 1Gα1-1N, zAz buffer layer to an amorphous GσAt crystal by changing the crystal growth method and forming at least two or more layers of GaAs and AIAJ. Even with a superlattice layer structure consisting of the above-mentioned Gα1-zMzA buffer layer, it is possible to prevent crystal defects from being introduced into the active layer, as in the case of the Gα1-zMzA buffer layer.

以下、本発明の変形例を第2図及び第3図を用いて説明
する。
Hereinafter, a modification of the present invention will be explained using FIG. 2 and FIG. 3.

第2図において、 GaAslB晶(熱伝導率o、s 
rr/、、z’)よりも良好な熱伝導性を示すル型シリ
コン結晶基板(熱伝導率1.5 W/cyt −g )
 11上に、FL型Ga1−zM、zAtAtバラフッ
2(0≦2≦1)と% n型Ga1−yA1yAzクラ
ッド層13と、ル型またはP型Gα1−xNLxAz活
性層14(r<y)とtp型Ga1−ylJ、yAz 
 クラッド層15とを、良く知られたMO−CVD法(
MetalOrganic −Chemical Va
por Dmpozition )あるいはMBE法(
MoLgcttLar Bgam Epitaxy )
を用いて連続的に積層させる。次に、上記p型Gα+−
yNlyAzクラッド層15上に、所定のストライプ状
開口を有する酸化膜16を通常のCVD法(Chemi
cal VaporDeposition )を用いて
設けたのち、前記シリコン結晶基板11と、前記酸化膜
16を含む前記P型Ga 1−AlyAzクラッド層1
5と層表5に金属電極17を真空蒸着法を用いて被着す
る。次に、所定の寸法(例えば400μm X 300
μm(共振器長))で骨間することにより、半導体レー
ザ装置が出来上がる。
In Figure 2, GaAslB crystal (thermal conductivity o, s
r-type silicon crystal substrate (thermal conductivity 1.5 W/cyt-g) that exhibits better thermal conductivity than rr/,,z')
11, FL type Ga1-zM, zAtAt rose 2 (0≦2≦1) and % n-type Ga1-yA1yAz cladding layer 13, R-type or P-type Ga1-xNLxAz active layer 14 (r<y) and tp. Type Ga1-ylJ, yAz
The cladding layer 15 is formed using the well-known MO-CVD method (
MetalOrganic-Chemical Va
por Dmpozition) or MBE method (
MoLgcttLar Bgam Epitaxy)
are used to stack them continuously. Next, the above p-type Gα+−
An oxide film 16 having predetermined stripe-shaped openings is formed on the yNlyAz cladding layer 15 by a normal CVD method (Chemical CVD method).
After forming the silicon crystal substrate 11 and the P-type Ga 1-AlyAz cladding layer 1 including the oxide film 16
A metal electrode 17 is deposited on the layer surface 5 and the layer surface 5 using a vacuum evaporation method. Next, the predetermined dimensions (for example, 400 μm x 300
A semiconductor laser device is completed by interosseous separation in micrometers (resonator length).

前記シリコ/基板11と前記ル型GαI −z AAz
 7Cy バッファ層12との格子定数差により、ミス
フィツト転位等の結晶欠陥が、前記ル型Gα+ −z 
AAz Atバッファ層12中に導入されるが、シリコ
ン基板11の基板温度、あるいはル型Gα1−zA1z
Ajバッファ層12の組成、結晶成長速度等を適切に選
択することによりミスフィツト転位を前記ル型Gα1−
x fiJlx Ax 活性層4にはいることを防ぐこ
とが出来る。
The silico/substrate 11 and the Le-type GαI -z AAz
7Cy Due to the lattice constant difference with the buffer layer 12, crystal defects such as misfit dislocations are caused by the
AAz At is introduced into the buffer layer 12, but depending on the substrate temperature of the silicon substrate 11 or the Le type Gα1-zA1z
By appropriately selecting the composition, crystal growth rate, etc. of the Aj buffer layer 12, misfit dislocations are
x fiJlx Ax can be prevented from entering the active layer 4.

なお、上記変形例において、ル型Gα+ −Z 7Vl
 z Atバッファ層12の結晶成長条件を適切に選択
すればアモルファスQaAzを成長させることができる
。上記アモルファスGaA z層をバッファ層として用
いれば、シリコン基板11からの結晶欠陥の導入を防ぐ
ことができる。
In addition, in the above modification, the le-type Gα+ −Z 7Vl
If the crystal growth conditions for the z At buffer layer 12 are appropriately selected, amorphous QaAz can be grown. By using the amorphous GaA z layer as a buffer layer, introduction of crystal defects from the silicon substrate 11 can be prevented.

また第3図は別の変形例を示す説明図で、前記変形例中
に記載のル型Gα1−zklzAiバッファ層120代
りに、少なくとも2層以上のGaAs層とuAz層とを
交互に連続成長させた超格子層19を形成する。シリコ
/基板11からのミスフィツト転位は超格子層19の各
々の単原子層界面で緩和され、前記超格子層19上に設
けたル型またはp型Gα1−xA1xAz活性層14に
伝搬することはない。
FIG. 3 is an explanatory diagram showing another modification, in which at least two or more GaAs layers and uAz layers are alternately and continuously grown instead of the L-type Gα1-zklzAi buffer layer 120 described in the modification. A superlattice layer 19 is formed. Misfit dislocations from the silicon/substrate 11 are relaxed at each monoatomic layer interface of the superlattice layer 19 and do not propagate to the Le-type or p-type Gα1-xA1xAz active layer 14 provided on the superlattice layer 19. .

〔発明の効果〕〔Effect of the invention〕

本発明によれば、ル型またはp型Gα1−yAlyAz
活性層を挟むル型またはP型Gα+−xM、xAzクラ
ッド層とから成る積層体構造をサブマウントあるいはヒ
ートン/りを兼ねた良熱伝導性のシリコン結晶基板上に
一体形成することができるので、積層体構造とサブマウ
ントとの高精度位置合わせが不要となり、半導体レーザ
装置の生産性及びその歩留りを大幅に向上させることが
できる。また、非常に高価なGaAs結晶の代りに、大
面積の安価なシリコン結晶を基板として用いることで、
半導体レーザ装置の大幅なコスト低減(約1/10)の
効果がある。
According to the present invention, the Le-type or p-type Gα1-yAlyAz
The laminate structure consisting of the Le-type or P-type Gα+-xM and xAz cladding layers sandwiching the active layer can be integrally formed on a silicon crystal substrate with good thermal conductivity that also serves as a submount or a heaton. High-precision alignment between the laminate structure and the submount is no longer necessary, and the productivity and yield of semiconductor laser devices can be greatly improved. In addition, by using a large-area, inexpensive silicon crystal as the substrate instead of a very expensive GaAs crystal,
This has the effect of significantly reducing the cost (about 1/10) of the semiconductor laser device.

また、上記積層体構造とシリコン基板との間にル型Gα
+−zMzAz層あるいはアモルファスGaAt層ある
いは少なくとも2層以上のGaAs層と74 Az J
@とから成る超格子層をバッファ層として設けろことに
より、上記積層体構造とシリコン基板との格子定数差に
もとづくミスフィツト転位を積層体構造中に導入するこ
とを防止することができ、高信頼度を有する電気的光学
的特性を発揮することができる。
Furthermore, a Le-shaped Gα
+-zMzAz layer or amorphous GaAt layer or at least two or more GaAs layers and 74 Az J
By providing a superlattice layer consisting of @ as a buffer layer, it is possible to prevent misfit dislocations from being introduced into the laminate structure due to the difference in lattice constant between the laminate structure and the silicon substrate, resulting in high reliability. It is possible to exhibit electro-optical properties having the following characteristics.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を説明する半導体レーザ装置
の断面図でおる。 第2図及び第3図は本発明の詳細な説明する半導体レー
ザ装置の断面図である。 1・・・・・・・・・・・・シリコン結晶基板2・・・
・・・・・・・・・ル型Gα1−xk1scAzクラッ
ド層3・・・・・・・・・・・・ル型またはP型Gα+
 −、Al y A z活性層4・・・・・・・・・・
・・P型Gα1−xAlxAzクラッド層5・・・・・
・・・・・・・酸化膜 6・・・・・・・・・・・・金属電極 11・・・・・−・・シリコン基板 12・・・・・・・・・ルW Ga+−zMzAz /
クソファ層13・・・・・・・・・ル型Gα1−yAl
yAsクラッド層14・・・・・・・・・ル型またはP
型Ga + −x AJlx At活性層15・・・・
・・・・・p W Ga1−yNl、yAzクラッド層
16・・・・・・・・・酸化膜 17・・・・・・・・・電極
FIG. 1 is a sectional view of a semiconductor laser device illustrating an embodiment of the present invention. FIGS. 2 and 3 are cross-sectional views of a semiconductor laser device for explaining the present invention in detail. 1......Silicon crystal substrate 2...
......R type Gα1-xk1scAz cladding layer 3...R type or P type Gα+
-, Al y Az active layer 4...
...P-type Gα1-xAlxAz cladding layer 5...
......Oxide film 6...Metal electrode 11...Silicon substrate 12...Le W Ga+-zMzAz /
Fufa layer 13... Le type Gα1-yAl
yAs cladding layer 14... Le type or P
Type Ga + -x AJlx At active layer 15...
...... p W Ga1-yNl, yAz cladding layer 16 ...... Oxide film 17 ...... Electrode

Claims (1)

【特許請求の範囲】 1、任意の禁制帯幅を有する半導体層を、上記の禁制帯
幅より大きい禁制帯幅を有する半導体層で挟んで成る積
層体構造を、前記の半導体層とは電気的光学的に性質の
異なる半導体基板上に連続的に成長せしめたことを特徴
とする半導体レーザ装置。 2、上記積層体構造と半導体基板との間に、バッファ層
を設けたことを特徴とする特許請求の範囲第1項記載の
半導体レーザ装置。 3、上記バッファ層をアモルファスGaAsとしたこと
を特徴とする特許請求の範囲第2項記載の半導体レーザ
装置。 4、上記バッファ層を少なくとも2層以上のGaAsも
しくはAlAs超格子層を積層したことを特徴とする特
許請求の範囲第2項記載の半導体レーザ装置。
[Claims] 1. A stacked structure in which a semiconductor layer having an arbitrary forbidden band width is sandwiched between semiconductor layers having a forbidden band width larger than the above-mentioned forbidden band width is electrically different from the above-mentioned semiconductor layer. A semiconductor laser device characterized in that it is continuously grown on semiconductor substrates having different optical properties. 2. The semiconductor laser device according to claim 1, further comprising a buffer layer provided between the laminate structure and the semiconductor substrate. 3. The semiconductor laser device according to claim 2, wherein the buffer layer is made of amorphous GaAs. 4. The semiconductor laser device according to claim 2, wherein the buffer layer is a stack of at least two GaAs or AlAs superlattice layers.
JP61092069A 1986-04-23 1986-04-23 Semiconductor laser device Expired - Lifetime JPH0669113B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61092069A JPH0669113B2 (en) 1986-04-23 1986-04-23 Semiconductor laser device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61092069A JPH0669113B2 (en) 1986-04-23 1986-04-23 Semiconductor laser device

Publications (2)

Publication Number Publication Date
JPS62249495A true JPS62249495A (en) 1987-10-30
JPH0669113B2 JPH0669113B2 (en) 1994-08-31

Family

ID=14044172

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61092069A Expired - Lifetime JPH0669113B2 (en) 1986-04-23 1986-04-23 Semiconductor laser device

Country Status (1)

Country Link
JP (1) JPH0669113B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006310527A (en) * 2005-04-28 2006-11-09 Institute Of National Colleges Of Technology Japan Light emitting element using amorphous material substrate and its manufacturing method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5753927A (en) * 1980-09-18 1982-03-31 Oki Electric Ind Co Ltd Compound semiconductor device
JPS6174385A (en) * 1984-09-20 1986-04-16 Sony Corp Semiconductor laser

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5753927A (en) * 1980-09-18 1982-03-31 Oki Electric Ind Co Ltd Compound semiconductor device
JPS6174385A (en) * 1984-09-20 1986-04-16 Sony Corp Semiconductor laser

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006310527A (en) * 2005-04-28 2006-11-09 Institute Of National Colleges Of Technology Japan Light emitting element using amorphous material substrate and its manufacturing method
JP4590497B2 (en) * 2005-04-28 2010-12-01 独立行政法人国立高等専門学校機構 Light emitting device using amorphous material substrate and method for manufacturing the same

Also Published As

Publication number Publication date
JPH0669113B2 (en) 1994-08-31

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